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LTC4412HVIS6#TRMPBF

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Analog Devices AC-DC Controllers & Regulators, TSOT-23-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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LTC4412HVIS6#TRMPBF

Analog Devices · AC-DC Controllers & Regulators · TSOT-23-6

LTC4412HVIS6#TRMPBF from Analog Devices, in a TSOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VIN power_in Primary input supply that powers the internal circuitry and senses VIN against SENSE, with an operating supply range of 2.5V to 36V and optional bypass of 0.1µF to 10µF.
2 GND power_in Ground pin that provides the power return for all internal circuits.
3 CTL input Digital control input where a logic high (VIH, 0.9V typ min) forces the primary MOSFET off and the STAT pin to sink 10µA, with a 3.5µA internal pull-down forcing a logic low if open, and it can be biased from ground to 36V.
4 STAT output Open-drain status output that becomes a 10µA current sink (IS(SNK)) during reverse turn-off and can be biased from ground to 36V.
5 GATE output Gate drive output for the external primary P-channel MOSFET that regulates a 20mV forward voltage between VIN and SENSE, with a gate clamp voltage VG(ON) of 7V typical below the higher of VIN or SENSE.
6 SENSE power_in Power sense input that powers the internal circuitry from an auxiliary source and is compared against VIN, with an absolute maximum input range of -14V to 40V.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package TSOT-23-6
Category Power Management ICs
Pins 6

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Quiescent Supply Current at Low Supply, Forward Regulation IQFL 11 19 µA VIN = 3.6V; forward regulation, VSENSE = 3.5V and 3.6V averaged (Note 3) 2
Quiescent Supply Current at High Supply, Forward Regulation IQFH 18 32 µA VIN = 36V; forward regulation, VSENSE = 35.9V and 36V averaged (Note 3) 2
Quiescent Supply Current at Low Supply, Reverse Turn-Off IQRL 10 19 µA VIN = 3.6V, VSENSE = 3.7V; combined current of VIN and SENSE pins 2
Quiescent Supply Current at High Supply, Reverse Turn-Off IQRH 19 33 µA VIN = 35.9V, VSENSE = 36V; combined current of VIN and SENSE pins 2
Quiescent Supply Current at Low Supply with CTL Active IQCL 7 13 µA VIN = 3.6V, VSENSE = 0V, VCTL = 1V 2
Quiescent Supply Current at High Supply with CTL Active IQCH 15 25 µA VIN = 36V, VSENSE = 8V, VCTL = 1V 2
VIN and SENSE Pin Leakage Currents ILEAK -3 0 1 µA VIN = 28V, VSENSE = 0V; VSENSE = 28V, VIN = 0V 2
PowerPath Switch Forward Regulation Voltage VFR 10 20 32 mV VIN, VSENSE, 2.5V ≤ VIN ≤ 36V 2
PowerPath Switch Reverse Turn-Off Threshold Voltage VRTO 10 20 32 mV VSENSE, VIN, 2.5V ≤ VIN ≤ 36V 2
GATE Source Current IG(SRC) -5 -2.5 -1 µA Active Forward Regulation (Note 4) 3
GATE Sink Current IG(SNK) 25 50 85 µA Active Forward Regulation (Note 4) 3
GATE Clamp Voltage VG(ON) 6.3 7 7.7 V Apply IGATE = 1µA, VIN = 12V, VSENSE = 11.9V, Measure VIN, VGATE 3
GATE Off Voltage VG(OFF) 0.13 0.25 V Apply IGATE = -5µA, VIN = 12V, VSENSE = 12.1V, Measure VSENSE, VGATE 3
GATE Turn-On Time tG(ON) 110 175 µs VGS < -3V, CGATE = 1nF (Note 5) 3
GATE Turn-Off Time tG(OFF) 13 22 µs VGS > -1.5V, CGATE = 1nF (Note 6) 3
STAT Off Current IS(OFF) -1 0 1 µA 2.5V ≤ VIN ≤ 36V (Note 7) 3
STAT Sink Current IS(SNK) 6 10 17 µA 2.5V ≤ VIN ≤ 36V (Note 7) 3
STAT Turn-On Time tS(ON) 4.5 25 µs Note 8 3
STAT Turn-Off Time tS(OFF) 40 75 µs Note 8 3
CTL Input Low Voltage VIL 0.35 V 2.5V ≤ VIN ≤ 36V 3
CTL Input High Voltage VIH 0.9 V 2.5V ≤ VIN ≤ 36V 3
CTL Input Pull-Down Current ICTL 1 3.5 5.9 µA 0.35V ≤ VCTL ≤ 36V 3
CTL Hysteresis HCTL 135 mV 2.5V ≤ VIN ≤ 36V 3
Operating Supply Range VIN 2.5 36 V VIN and/or VSENSE Must Be in This Range 2
Supply Voltage VIN -14 40 V 2
Voltage from VIN to SENSE -40 40 V 2
CTL Input Voltage CTL -0.3 40 V 2
SENSE Input Voltage SENSE -14 40 V 2
GATE Output Voltage GATE -0.3 V Higher of VIN + 0.3V or SENSE + 0.3V 2
STAT Output Voltage STAT -0.3 40 V 2
Operating Ambient Temperature Range TA -40 125 °C 2
Operating Junction Temperature TJ -40 125 °C 2
Storage Temperature Range TSTG -65 150 °C 2
Lead Temperature (Soldering, 10 sec) 300 °C Soldering, 10 sec 2
Maximum Junction Temperature TJMAX 125 °C 2
Thermal Resistance, Junction to Ambient θJA 230 °C/W 2

CAD (KiCad official)

  • Symbol: LTC4412HVIS6#TRMPBF
  • Footprint: Package_TO_SOT_SMD:TSOT-23-6
  • 3D model: TSOT-23-6 (KiCad packages3D, STEP)
  • 3D model files: ltc4412hvis6-trmpbf-etched.step / ltc4412hvis6-trmpbf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ltc4412hvis6-trmpbf.step / ltc4412hvis6-trmpbf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (12 pp, sha256 369c086c5cd0d751, retrieved 2026-10-28, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF