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TPS74611PQWDRVRQ1
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Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, WSON-6-EP(2x2). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTPS74611PQWDRVRQ1
Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · WSON-6-EP(2x2)
TPS74611PQWDRVRQ1 from Texas Instruments, in a WSON-6-EP(2x2). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT | power_out | Regulated output voltage pin; a capacitor of 1 µF to 220 µF (minimum derated 0.47 µF) is required from OUT to ground for stability. |
| 2 | NC | unconnected | No internal connection; ground this pin for better thermal performance. |
| 3 | GND | power_in | Ground pin, electrically connected to the thermal pad node. |
| 4 | EN | input | Enable pin; drive EN above VEN(HI) to turn on the regulator and below VEN(LO) to place the LDO in shutdown, with VEN rated 0 V to 6.0 V in recommended operating conditions. |
| 5 | PG | output | Power-good output available in open-drain and push-pull topologies, with a pullup resistor required for the open-drain version and VPG rated 0 V to 6.0 V. |
| 6 | IN | power_in | Input pin supplying the LDO over 1.5 V to 6.0 V; use the recommended value or larger ceramic capacitor from IN to ground, placed as close to the device as possible. |
| 7 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | WSON-6-EP(2x2) |
| Category | Power Management (PMIC) |
| Pins | 7 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply input voltage | VIN | 1.5 | 6 | V | 4 | ||
| Output voltage (fixed version) | VOUT | 0.65 | 5 | V | Fixed version | 4 | |
| Output current | IOUT | 0 | 1 | A | 4 | ||
| Output capacitor | COUT | 1 | 220 | µF | Minimum derated capacitance of 0.47 µF is required for stability | 4 | |
| Enable voltage | VEN | 0 | 6 | V | 4 | ||
| PG voltage | VPG | 0 | 6 | V | 4 | ||
| Junction temperature | TJ | -40 | 150 | °C | 4 | ||
| Enable toggle frequency | fEN | 10 | kHz | 4 | |||
| Supply voltage | VIN | -0.3 | 6.5 | V | 4 | ||
| Enable voltage | VEN | -0.3 | 6.5 | V | 4 | ||
| Feedback voltage | VFB | -0.3 | 2 | V | 4 | ||
| Power-good voltage | VPG | -0.3 | 6.5 | V | 4 | ||
| Output voltage | VOUT | -0.3 | V | Max is VIN + 0.3 V or 6.0 V, whichever is smaller | 4 | ||
| Power-good current | IPG | -10 | 10 | mA | 4 | ||
| Operating junction temperature | TJ | -40 | 150 | °C | 4 | ||
| Storage temperature | Tstg | -65 | 150 | °C | 4 | ||
| Output accuracy | -0.85 | 0.85 | % | TJ = 25°C | 5 | ||
| Output accuracy | -1 | 1 | % | -40°C ≤ TJ ≤ 85°C | 5 | ||
| Output accuracy | -1.5 | 1.5 | % | -40°C ≤ TJ ≤ 150°C | 5 | ||
| Line regulation | 2 | 7.5 | mV | VOUT(NOM) + 0.5 V ≤ VIN ≤ 6.0 V | 5 | ||
| Load regulation | 0.03 | V/A | 0.1 mA ≤ IOUT ≤ 1 A, VIN ≥ 2.0 V | 5 | |||
| Ground current | IGND | 25 | 32 | µA | IOUT = 0 mA, TJ = 25°C | 5 | |
| Ground current | IGND | 25 | 36 | µA | IOUT = 0 mA, -40°C ≤ TJ ≤ 150°C | 5 | |
| Shutdown current | ISHDN | 0.1 | 1 | µA | VEN ≤ 0.3 V, 1.5 V ≤ VIN ≤ 6.0 V, -40°C ≤ TJ ≤ 125°C | 5 | |
| Shutdown current | ISHDN | 0.1 | 1.55 | µA | VEN ≤ 0.3 V, 1.5 V ≤ VIN ≤ 6.0 V, -40°C ≤ TJ ≤ 150°C | 5 | |
| Output current limit | ICL | 1.22 | 1.5 | 1.83 | A | VOUT(NOM) ≥ 1 V, VOUT = VOUT(NOM) × 0.85, VIN = VOUT(NOM) + 1.0 V | 5 |
| Short-circuit current limit | ISC | 500 | 680 | 850 | mA | VOUT = 0 V, VOUT(NOM) ≥ 1 V, VIN = VOUT(NOM) + 1.0 V | 5 |
| Dropout voltage | VDO | 600 | 790 | mV | 1.0 V ≤ VOUT < 1.2 V; IOUT = 1 A, VOUT = 0.95 x VOUT(NOM) | 5 | |
| Power-supply rejection ratio | PSRR | 53 | dB | VOUT = 1.8 V, VIN = 2.8 V, IOUT = 1 A, COUT = 2.2 µF, f = 1 kHz | 5 | ||
| Power-supply rejection ratio | PSRR | 38 | dB | VOUT = 1.8 V, VIN = 2.8 V, IOUT = 1 A, COUT = 2.2 µF, f = 100 kHz | 5 | ||
| Power-supply rejection ratio | PSRR | 30 | dB | VOUT = 1.8 V, VIN = 2.8 V, IOUT = 1 A, COUT = 2.2 µF, f = 1 MHz | 5 | ||
| Output noise voltage | VN | 53 | µVRMS | BW = 10 Hz to 100 kHz, VOUT = 0.9 V, VIN = 1.9 V | 5 | ||
| Undervoltage lockout, rising | VUVLO | 1.21 | 1.33 | 1.47 | V | VIN rising | 6 |
| Undervoltage lockout, falling | VUVLO | 1.17 | 1.29 | 1.42 | V | VIN falling | 6 |
| Undervoltage lockout hysteresis | VUVLO,HYST | 40 | mV | VIN hysteresis | 6 | ||
| Startup time | tSTR | 200 | 500 | 650 | µs | From EN low-to-high transition to VOUT = VOUT(NOM) x 95% | 6 |
| EN pin high voltage (enabled) | VHI | 1 | V | 6 | |||
| EN pin low voltage (disabled) | VLO | 0.3 | V | 6 | |||
| PG high threshold | PGHTH | 89 | 92 | 96 | %VOUT | VOUT increasing | 6 |
| PG low threshold | PGLTH | 86 | 90 | 93 | %VOUT | VOUT decreasing | 6 |
| PG pin low-level output voltage | VOL(PG) | 300 | mV | VIN ≥ 1.5 V, ISINK = 1 mA | 6 | ||
| PG pin high-level output voltage (push-pull only) | VOH(PG) | 0.8 | × VOUT | VOUT ≥ 1.0 V, ISOURCE = 0.04 mA | 6 | ||
| PG pin leakage current (open-drain only) | Ilkg(PG) | 7 | 50 | nA | VOUT > PGHTH, VPG = 6.0 V | 6 | |
| Thermal shutdown | TSD | 170 | °C | Shutdown, temperature increasing | 6 | ||
| Thermal shutdown reset | TSD | 155 | °C | Reset, temperature decreasing | 6 | ||
| PG hysteresis | PGHYST | 2 | %VOUT | 6 | |||
| Enable pin current | IEN | 10 | nA | VIN = VEN = 6.0 V | 6 | ||
| Pulldown resistance | RPULLDOWN | 95 | Ω | VIN = 6.0 V | 6 | ||
| PG delay time rising | tPGDH | 135 | 165 | 178 | µs | Time from 92% VOUT to 20% of PG; output overdrive = 10% | 6 |
| PG delay time falling | tPGDL | 1.5 | 7 | 10 | µs | Time from 90% VOUT to 80% of PG; output overdrive = 10% | 6 |
| Junction-to-ambient thermal resistance (DRV WSON) | RθJA | 80.3 | °C/W | DRV (WSON) 6-pin | 5 | ||
| Junction-to-case (top) thermal resistance (DRV WSON) | RθJC(top) | 98.7 | °C/W | DRV (WSON) 6-pin | 5 | ||
| Junction-to-board thermal resistance (DRV WSON) | RθJB | 44.8 | °C/W | DRV (WSON) 6-pin | 5 | ||
| Junction-to-top characterization parameter (DRV WSON) | ψJT | 6.1 | °C/W | DRV (WSON) 6-pin | 5 | ||
| Junction-to-board characterization parameter (DRV WSON) | ψJB | 45 | °C/W | DRV (WSON) 6-pin | 5 | ||
| Junction-to-case (bottom) thermal resistance (DRV WSON) | RθJC(bot) | 20.8 | °C/W | DRV (WSON) 6-pin | 5 | ||
| Input capacitor | CIN | 1 | µF | 4 | |||
| Feed-forward capacitor | CFF | 10 | nF | 4 |
CAD (KiCad official)
- Symbol:
TPS74611PQWDRVRQ1 - Footprint:
Package_SON:WSON-6-1EP_2x2mm_P0.65mm_EP1x1.6mm - 3D model: WSON-6-EP(2x2) (KiCad packages3D, STEP)
- 3D model files:
tps74611pqwdrvrq1-etched.step/tps74611pqwdrvrq1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps74611pqwdrvrq1.step/tps74611pqwdrvrq1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (48 pp, sha256
184c3108e6b0527b, retrieved 2026-11-06, tier: manufacturer) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).