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Contents

README

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NJM072CG-TE2

JRC · Operational Amplifier · SOP-8

NJM072CG-TE2 from JRC, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A OUTPUT output Channel A amplifier output; output swing is ±12V min into RL=10kΩ at ±15V supplies.
2 A -INPUT input Channel A inverting input; differential input voltage is limited to ±36V.
3 A +INPUT input Channel A non-inverting input; differential input voltage is limited to ±36V.
4 V- power_in Negative supply (ground for single supply); supply range is ±4 to ±18V.
5 B +INPUT input Channel B non-inverting input; differential input voltage is limited to ±36V.
6 B -INPUT input Channel B inverting input; differential input voltage is limited to ±36V.
7 B OUTPUT output Channel B amplifier output; output swing is ±12V min into RL=10kΩ at ±15V supplies.
8 V+ power_in Positive supply; supply range is ±4 to ±18V.

Key specifications

Parameter Value
Manufacturer JRC
Package SOP-8
Category Amplifiers/Comparators
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Offset Voltage VIO 3 10 mV RS= 50Ω, Ta = 25°C; V+/V-= ±15V 4
Input Offset Voltage (0°C to 70°C) VIO 13 mV RS= 50Ω, 0°C < Ta < 70°C 4
Input Bias Current IB 30 200 pA Ta = 25°C 4
Input Bias Current (0°C to 70°C) IB 7 nA 0°C < Ta < 70°C 4
Input Offset Current IIO 5 50 pA Ta = 25°C 4
Input Offset Current (0°C to 70°C) IIO 10 nA 0°C < Ta < 70°C 4
Open-Loop Voltage Gain AV 25 200 V/mV RL≥ 2kΩ, VO= ± 10V, Ta = 25°C 4
Open-Loop Voltage Gain (0°C to 70°C) AV 15 V/mV RL≥ 2kΩ, VO= ± 10V, 0°C < Ta < 70°C 4
Common-Mode Rejection Ratio CMR 70 100 dB VIC = VICMMIN, RS≤ 10kΩ 4
Supply Voltage Rejection Ratio SVR 70 100 dB V+/V-= ±9V to ±15V, RS≤ 10kΩ 4
Supply Current per Amplifier ISUPPLY 1.4 2.5 mA No Signal 4
Slew Rate SR 8 13 V/μs VIN = 10Vpp, RL= 2kΩ, CL=00pF, See Figure1 4
Supply Voltage (absolute maximum) V+/V- -18 18 V Supply Voltage V+/V- ±18 V as printed 3
Differential Input Voltage VID -36 36 V Voltage difference between +INPUT and -INPUT 3
Input Voltage VIN -0.3 36 V Referenced to V-: V- -0.3 to V- +36 V 3
Output Terminal Input Voltage VO -0.3 0.3 V Referenced to rails: V- -0.3 (min) to V+ +0.3 (max) 3
Power Dissipation (SOP8, 2-Layer) PD 720 mW Ta=25°C, SOP8, 2-Layer 3
Power Dissipation (SOP8, 4-Layer) PD 1100 mW Ta=25°C, SOP8, 4-Layer 3
Storage Temperature Tstg -65 150 °C 3
Junction Temperature Tj 150 °C 3
Supply Voltage (recommended) V+/V- 4 18 V Ta = 25˚C; printed as ±4 to ±18 V per rail 3
Operating Temperature Topr -40 125 °C 3
Junction-to-Ambient Thermal Resistance (SOP8, 2-Layer) Θja 175 °C/W SOP8, 2-Layer 3
Junction-to-Ambient Thermal Resistance (SOP8, 4-Layer) Θja 118 °C/W SOP8, 4-Layer 3
Junction-to-Top of Package Characterization Parameter (SOP8, 2-Layer) Ψjt 42 °C/W SOP8, 2-Layer 3
Junction-to-Top of Package Characterization Parameter (SOP8, 4-Layer) Ψjt 37 °C/W SOP8, 4-Layer 3

CAD (KiCad official)

  • Symbol: NJM072CG-TE2
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: njm072cg-te2-etched.step / njm072cg-te2-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); njm072cg-te2.step / njm072cg-te2.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: JRC datasheet (21 pp, sha256 330b084827ac2651, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF