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README

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MCP4631-103E

Microchip Tech · Digital Potentiometers · TSSOP-14

MCP4631-103E from Microchip Tech, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 HVC/A0 input Address 0 input for the I2C interface, latched at POR/BOR, which also acts as the High Voltage command pin when driven to VIHH; it is a high-voltage tolerant input with Schmitt trigger.
2 SCL input I2C serial clock input, high-voltage tolerant with Schmitt trigger, accepting only external clock signals as the slave device.
3 SDA bidirectional I2C serial data input/output implemented as an open-drain N-channel driver, high-voltage tolerant with Schmitt trigger.
4 VSS power_in Device ground reference, to which the VDD supply is referenced.
5 P1B passive Potentiometer 1 Terminal B analog pin; voltage must be between VSS and VDD and it supports both positive and negative current.
6 P1W passive Potentiometer 1 Wiper Terminal analog pin; voltage must be between VSS and VDD and it supports both positive and negative current.
7 P1A passive Potentiometer 1 Terminal A analog pin; voltage must be between VSS and VDD and it supports both positive and negative current.
8 P0A passive Potentiometer 0 Terminal A analog pin; voltage must be between VSS and VDD and it supports both positive and negative current.
9 P0W passive Potentiometer 0 Wiper Terminal analog pin; voltage must be between VSS and VDD and it supports both positive and negative current.
10 P0B passive Potentiometer 0 Terminal B analog pin; voltage must be between VSS and VDD and it supports both positive and negative current.
11 NC unconnected No connection; these pins should be connected to either VDD or VSS.
12 A2 input I2C interface Address 2 input, high-voltage tolerant with Schmitt trigger, used with A1 and A0 to set the device address on the bus.
13 A1 input I2C interface Address 1 input, high-voltage tolerant with Schmitt trigger, used with A2 and A0 to set the device address on the bus.
14 VDD power_in Positive power supply input referenced to VSS; electrical performance may not meet data sheet specifications while VDD is below Vmin (2.7V).

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package TSSOP-14
Category ADC/DAC/Data Conversion
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage VDD 2.7 5.5 V 4
Supply Voltage (serial interface only) VDD 1.8 2.7 V Serial Interface only. 4
Resistance tolerance RAB -20 20 % Resistance (± 20%), -103 devices 5
Nominal resistance RAB RAB 8 10 12 k -103 devices (Note 1) 5
Wiper resistance RW 75 160 Ω VDD = 5.5 V, IW = 2.0 mA, code = 00h 5
Wiper resistance RW 75 300 Ω VDD = 2.7 V, IW = 2.0 mA, code = 00h 5
Nominal resistance match /RAB0-RAB1/ /RAB 0.2 1.25 % MCP46X1 devices only 5
Full-Scale Error VWFSE -2 -0.1 LSb 10 k 7-bit 3.0V VDD 5.5V 7
Zero-Scale Error VWZSE 0.1 2 LSb 10 k 7-bit 3.0V VDD 5.5V 7
Potentiometer Integral Non-linearity INL -0.5 0.25 0.5 LSb 7-bit, MCP4XX1 devices only (Note 2) 7
Potentiometer Differential Non-linearity DNL -0.25 0.125 0.25 LSb 7-bit, MCP4XX1 devices only (Note 2) 7
Maximum current through Terminal A and Terminal B IAB 0.688 mA IAB, VB = 0V, VA = 5.5V, RAB(MIN) = 8000 6
Maximum current through Terminal A IAW 2.5 mA Terminal A IAW, W = Full-Scale (FS) 6
Maximum current through Terminal B IBW 2.5 mA Terminal B IBW, W = Zero Scale (ZS) 6
Maximum current through Terminal W IAW or IBW 2.5 mA Terminal W IAW or IBW, W = FS or ZS 6
Leakage current into A, W or B IWL 100 nA MCP4XX1 PxA = PxW = PxB = VSS 6
Bandwidth -3 dB BW 1 MHz 10 k 7-bit Code = 40h 8
Capacitance (PA) CAW 75 pF f =1 MHz, Code = Full-Scale 10
Capacitance (PW) CW 120 pF f =1 MHz, Code = Full-Scale 10
Capacitance (PB) CBW 75 pF f =1 MHz, Code = Full-Scale 10
Supply Current, serial interface active at 3.4 MHz IDD 600 µA Serial Interface Active, HVC/A0 = VIH (or VIL) (Note 11) Write all 0’s to Volatile Wiper 0 VDD = 5.5V, FSCL = 3.4 MHz 4
Supply Current, serial interface active at 100 kHz IDD 250 µA Serial Interface Active, HVC/A0 = VIH (or VIL) (Note 11) Write all 0’s to Volatile Wiper 0 VDD = 5.5V, FSCL = 100 kHz 4
Supply Current, serial interface inactive IDD 2.5 5 µA Serial Interface Inactive, (Stop condition, SCL = SDA = VIH), Wiper = 0 VDD = 5.5V, HVC/A0 = VIH 4
VDD Start Voltage to ensure Wiper Reset VBOR 1.65 V RAM retention voltage (VRAM) < VBOR 4
Delay after device exits the reset state TBORD 10 20 µs Delay after device exits the reset state (VDD > VBOR) 4
High Voltage Limit VMAX 12.5 V Pin can tolerate VMAX or less. 11
Weak Pull-up / Pull-down Current IPU 1.75 mA Internal VDD pull-up, VIHH pull-down VDD = 5.5V, VIHH = 12.5V 12
Output Low Voltage (SDA) VOL 0.4 V VDD 2.0V, IOL = 3 mA 12
Input Leakage Current IIL -1 1 µA VIN = VDD and VIN = VSS 12
Pin Capacitance CIN, COUT 10 pF fC = 3.4 MHz 12
HVC Pull-up / Pull-down Resistance RHVC 16 k VDD = 5.5V, VHVC = 3V 12
Nominal Resistance Tempco RAB/T 50 ppm/°C TA = -20°C to +70°C 5
Nominal Resistance Tempco RAB/T 100 ppm/°C TA = -40°C to +85°C 5
Nominal Resistance Tempco RAB/T 150 ppm/°C TA = -40°C to +125°C 5
Ratiometric Tempco VWB/T 15 ppm/°C Code = Midscale (80h or 40h) 5
Operating Temperature Range TA -40 125 °C 16
Storage Temperature Range TA -65 150 °C 16
Voltage on VDD with respect to VSS VDD -0.6 7 V with respect to VSS 3
Voltage on HVC/A0, A1, A2, SCL, and SDA with respect to VSS HVC/A0, A1, A2, SCL, SDA -0.6 12.5 V with respect to VSS 3
Ambient temperature with power applied TA -40 125 °C with power applied 3
Maximum current into VDD pin IDD 100 mA 3
Maximum current into PXA, PXW & PXB pins IPX -2.5 2.5 mA 3
Maximum Junction Temperature TJ 150 °C 3
Package power dissipation, TSSOP-14 PD 1 W TA = +50°C, TJ = +150°C 3

CAD (KiCad official)

  • Symbol: MCP4631-103E
  • Footprint: Package_SO:TSSOP-14_4.4x5mm_P0.65mm
  • 3D model: TSSOP-14 (KiCad packages3D, STEP)
  • 3D model files: mcp4631-103e-etched.step / mcp4631-103e-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mcp4631-103e.step / mcp4631-103e.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (102 pp, sha256 ee77464c39584a73, retrieved 2026-10-28, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF