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Contents

README

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TPS62143RGTR

Texas Instruments · DC-DC Converters · TQFN-16-EP(3x3)

TPS62143RGTR from Texas Instruments, in a TQFN-16-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SW output Switch node connected to the internal MOSFET switches; inductor is connected between this pin and the output capacitor.
2 SW output Switch node connected to the internal MOSFET switches; inductor is connected between this pin and the output capacitor.
3 SW output Switch node connected to the internal MOSFET switches; inductor is connected between this pin and the output capacitor.
4 PG tri_state Open-drain power good output that signals high impedance when VOUT is ready at nominal regulation and pulls low when VOUT falls below nominal threshold.
5 FB input Voltage feedback input internally pulled down for fixed 5.0-V output version; recommend connecting to AGND for improved thermal performance.
6 AGND power_in Analog ground reference that must be connected directly to the exposed thermal pad and common ground plane.
7 FSW input Switching frequency select input with internal pulldown; low selects ~2.5 MHz, high selects ~1.25 MHz for typical operation.
8 DEF input Output voltage scaling input with internal pulldown; low selects nominal output voltage, high selects nominal output voltage plus 5%.
9 SS/TR input Soft-start and tracking input where external capacitor sets the internal voltage reference rise time and enables voltage tracking and sequencing.
10 AVIN power_in Supply voltage for control circuitry that must be connected to the same source as PVIN.
11 PVIN power_in Supply voltage for power stage switching circuit that must be connected to the same source as AVIN.
12 PVIN power_in Supply voltage for power stage switching circuit that must be connected to the same source as AVIN.
13 EN input Enable input with internal ~400 kΩ pulldown resistor; high enables device operation, low or floating disables device and initiates shutdown mode.
14 VOS input Output voltage sense pin for the control loop feedback that must connect to the actual VOUT at the output capacitor.
15 PGND power_in Power ground reference that must be connected directly to the exposed thermal pad and common ground plane for proper dissipation.
16 PGND power_in Power ground reference that must be connected directly to the exposed thermal pad and common ground plane for proper dissipation.
17 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TQFN-16-EP(3x3)
Category Power Management (PMIC)
Pins 17

CAD (KiCad official)

  • Symbol: TPS62143RGTR
  • Footprint: Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm
  • 3D model: TQFN-16-EP(3x3) (KiCad packages3D, STEP)
  • 3D model files: tps62143rgtr-etched.step / tps62143rgtr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps62143rgtr.step / tps62143rgtr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (42 pp, sha256 7151fc4cb879c36e, retrieved 2026-09-23, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF