AD8436ACPZ-R7 from Analog Devices, in a LFCSP-20(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	DNC	unconnected	Do Not Connect. Used for factory test - leave floating.
2	RMS	input	AC input to the RMS core. Feeds the internal 8 kΩ RMS core input resistor.
3	IBUFOUT	output	FET input buffer output pin. Buffered high-Z input signal available here for external routing to the RMS core.
4	IBUFIN-	input	FET input buffer inverting input pin. Together with the optional 10 kΩ gain resistor sets the buffer gain.
5	IBUFIN+	input	FET input buffer noninverting input pin. High-impedance (>10^12 Ω, ≤2 pF) signal input to the on-board FET buffer.
6	IBUFGN	passive	Optional 10 kΩ precision gain resistor node for setting the FET input buffer gain (typically gain of ×2 or more).
7	DNC	unconnected	Do Not Connect. Used for factory test - leave floating.
8	OGND	passive	Internal 16 kΩ I-to-V resistor node. Ground reference for the output current-to-voltage conversion.
9	OUT	output	RMS core voltage or current output. Provides the DC-equivalent RMS result; output resistance ~16 kΩ.
10	VEE	power_in	Negative supply rail. -2.4 V to -18 V dual-supply, or GND for single-supply operation (4.8 V to 36 V total).
11	IGND	passive	Half-supply node. Provides the mid-rail reference used for single-supply biasing of the input signal path.
12	OBUFIN+	input	Output buffer noninverting input pin. Signal input to the precision DC output buffer amplifier.
13	OBUFIN-	input	Output buffer inverting input pin. Feedback node of the precision DC output buffer.
14	OBUFOUT	output	Output buffer output pin. Drives low-impedance loads with up to 15 mA source / 0.5 mA sink current.
15	OBUFV+	power_in	Positive supply pin dedicated to the DC output buffer. Typically tied to VCC.
16	IBUFV+	power_in	Positive supply pin dedicated to the FET input buffer. Typically tied to VCC.
17	VCC	power_in	Positive supply rail for the RMS core. +2.4 V to +18 V (dual) or 4.8 V to 36 V (single supply).
18	CCF	passive	Connection for crest factor capacitor. External capacitor (typ. 0.1 µF) extends usable crest factor up to 10.
19	CAVG	passive	Connection for averaging capacitor. External CAVG (typ. 10 µF) sets the RMS averaging time constant.
20	SUM	input	Summing amplifier input pin. Signal summing node feeding the RMS core.
EP	EP	passive	Exposed pad. Connection to ground is optional; leave floating or tie to GND for improved thermal performance.

Key specifications

Parameter	Value
Manufacturer	Analog Devices
Package	LFCSP-20(4x4)
Category	Data Acquisition
Pins	21

Ordering variants

Same part, different packaging or reel option.

AD8436ACPZ-R7
AD8436ACPZ-RL
AD8436ACPZ-WP
AD8436ACPZ-R7BCPZ-R7
AD8436ACPZ-R7BCPZ-RL
AD8436ACPZ-R7BCPZ-WP
AD8436ACPZ-R7JCPZ-R7
AD8436ACPZ-R7JCPZ-RL
AD8436ACPZ-R7ARQZ-R7
AD8436ACPZ-R7ARQZ-RL
AD8436ACPZ-R7ARQZ
AD8436ACPZ-R7BRQZ-R7
AD8436ACPZ-R7BRQZ-RL
AD8436ACPZ-R7BRQZ

CAD (KiCad official)

Symbol: AD8436ACPZ-R7
Footprint: Package_DFN_QFN:QFN-20-1EP_4x4mm_P0.5mm_EP2.5x2.5mm
3D model: LFCSP-20(4x4) (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Analog Devices datasheet (21 pp, sha256 257a2ad3a0ca7909, retrieved 2026-08-17, tier: lcsc)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF