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Contents

README

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MSP430F155IPMR

Texas Instruments · Microcontrollers (MCU/MPU/SOC) · QFP-64(10x10)

MSP430F155IPMR from Texas Instruments, in a QFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 DVCC power_in Digital supply voltage, positive terminal; supplies all digital parts.
2 P6.3/A3 bidirectional General-purpose digital I/O pin; analog input A3 of the 12-bit ADC.
3 P6.4/A4 bidirectional General-purpose digital I/O pin; analog input A4 of the 12-bit ADC.
4 P6.5/A5 bidirectional General-purpose digital I/O pin; analog input A5 of the 12-bit ADC.
5 P6.6/A6/DAC0 bidirectional General-purpose digital I/O pin; analog input A6 of the 12-bit ADC and DAC12.0 output.
6 P6.7/A7/DAC1/SVSIN bidirectional General-purpose digital I/O pin; analog input A7 of the 12-bit ADC, DAC12.1 output, and SVS input.
7 VREF+ power_in Output of the positive terminal of the reference voltage in the ADC12.
8 XIN input Input port for crystal oscillator XT1; standard or watch crystals can be connected.
9 XOUT output Output terminal of crystal oscillator XT1.
10 VeREF+ input Input for an external reference voltage.
11 VREF-/VeREF- power_in Negative terminal for the reference voltage, either the internal reference or an externally applied reference voltage.
12 P1.0/TACLK bidirectional General-purpose digital I/O pin; Timer_A clock signal TACLK input.
13 P1.1/TA0 bidirectional General-purpose digital I/O pin; Timer_A CCI0A capture input, Out0 compare output, and BSL transmit.
14 P1.2/TA1 bidirectional General-purpose digital I/O pin; Timer_A CCI1A capture input and Out1 compare output.
15 P1.3/TA2 bidirectional General-purpose digital I/O pin; Timer_A CCI2A capture input and Out2 compare output.
16 P1.4/SMCLK bidirectional General-purpose digital I/O pin; SMCLK signal output.
17 P1.5/TA0 bidirectional General-purpose digital I/O pin; Timer_A compare Out0 output.
18 P1.6/TA1 bidirectional General-purpose digital I/O pin; Timer_A compare Out1 output.
19 P1.7/TA2 bidirectional General-purpose digital I/O pin; Timer_A compare Out2 output.
20 P2.0/ACLK bidirectional General-purpose digital I/O pin; ACLK output.
21 P2.1/TAINCLK bidirectional General-purpose digital I/O pin; Timer_A clock signal at INCLK.
22 P2.2/CAOUT/TA0 bidirectional General-purpose digital I/O pin; Timer_A CCI0B capture input, Comparator_A output, and BSL receive.
23 P2.3/CA0/TA1 bidirectional General-purpose digital I/O pin; Timer_A compare Out1 output and Comparator_A input.
24 P2.4/CA1/TA2 bidirectional General-purpose digital I/O pin; Timer_A compare Out2 output and Comparator_A input.
25 P2.5/ROSC bidirectional General-purpose digital I/O pin; input for an external resistor defining the DCO nominal frequency.
26 P2.6/ADC12CLK/DMAE0 bidirectional General-purpose digital I/O pin; 12-bit ADC conversion clock and DMA channel 0 external trigger.
27 P2.7/TA0 bidirectional General-purpose digital I/O pin; Timer_A compare Out0 output.
28 P3.0/STE0 bidirectional General-purpose digital I/O pin; slave transmit enable for USART0 in SPI mode.
29 P3.1/SIMO0/SDA bidirectional General-purpose digital I/O pin; slave in/master out of USART0 SPI mode, and I2C data for USART0 I2C mode.
30 P3.2/SOMI0 bidirectional General-purpose digital I/O pin; slave out/master in of USART0 SPI mode.
31 P3.3/UCLK0/SCL bidirectional General-purpose digital I/O pin; external clock input or clock output for USART0 UART/SPI modes, and I2C clock for USART0 I2C mode.
32 P3.4/UTXD0 bidirectional General-purpose digital I/O pin; transmit data out for USART0 UART mode.
33 P3.5/URXD0 bidirectional General-purpose digital I/O pin; receive data in for USART0 UART mode.
34 P3.6 bidirectional General-purpose digital I/O pin; the USART1 UTXD1 alternate function listed in the datasheet applies to 16x/161x devices only.
35 P3.7 bidirectional General-purpose digital I/O pin; the USART1 URXD1 alternate function listed in the datasheet applies to 16x/161x devices only.
36 P4.0/TB0 bidirectional General-purpose digital I/O pin; Timer_B capture CCI0A/B input and compare Out0 output.
37 P4.1/TB1 bidirectional General-purpose digital I/O pin; Timer_B capture CCI1A/B input and compare Out1 output.
38 P4.2/TB2 bidirectional General-purpose digital I/O pin; Timer_B capture CCI2A/B input and compare Out2 output.
39 P4.3 bidirectional General-purpose digital I/O pin; the Timer_B TB3 function listed in the datasheet applies to 16x/161x devices only.
40 P4.4 bidirectional General-purpose digital I/O pin; the Timer_B TB4 function listed in the datasheet applies to 16x/161x devices only.
41 P4.5 bidirectional General-purpose digital I/O pin; the Timer_B TB5 function listed in the datasheet applies to 16x/161x devices only.
42 P4.6 bidirectional General-purpose digital I/O pin; the Timer_B TB6 function listed in the datasheet applies to 16x/161x devices only.
43 P4.7/TBCLK bidirectional General-purpose digital I/O pin; Timer_B clock signal TBCLK input.
44 P5.0 bidirectional General-purpose digital I/O pin; the USART1 STE1 alternate function listed in the datasheet applies to 16x/161x devices only.
45 P5.1 bidirectional General-purpose digital I/O pin; the USART1 SIMO1 alternate function listed in the datasheet applies to 16x/161x devices only.
46 P5.2 bidirectional General-purpose digital I/O pin; the USART1 SOMI1 alternate function listed in the datasheet applies to 16x/161x devices only.
47 P5.3 bidirectional General-purpose digital I/O pin; the USART1 UCLK1 alternate function listed in the datasheet applies to 16x/161x devices only.
48 P5.4/MCLK bidirectional General-purpose digital I/O pin; main system clock MCLK output.
49 P5.5/SMCLK bidirectional General-purpose digital I/O pin; submain system clock SMCLK output.
50 P5.6/ACLK bidirectional General-purpose digital I/O pin; auxiliary clock ACLK output.
51 P5.7/TBOUTH/SVSOUT bidirectional General-purpose digital I/O pin; switches all PWM digital output ports to high impedance (Timer_B TB0 to TB6) and carries the SVS comparator output.
52 XT2OUT output Output terminal of crystal oscillator XT2.
53 XT2IN input Input port for crystal oscillator XT2; only standard crystals can be connected.
54 TDO/TDI bidirectional Test data output port; TDO/TDI data output or programming data input terminal.
55 TDI/TCLK input Test data input or test clock input; the device protection fuse is connected to TDI/TCLK.
56 TMS input Test mode select; input port used for device programming and test.
57 TCK input Test clock; clock input port for device programming, test, and bootstrap loader start.
58 RST/NMI input Reset input, nonmaskable interrupt input port, or bootstrap loader start in Flash devices.
59 P6.0/A0 bidirectional General-purpose digital I/O pin; analog input A0 of the 12-bit ADC.
60 P6.1/A1 bidirectional General-purpose digital I/O pin; analog input A1 of the 12-bit ADC.
61 P6.2/A2 bidirectional General-purpose digital I/O pin; analog input A2 of the 12-bit ADC.
62 AVSS power_in Analog supply voltage, negative terminal; supplies only the analog portion of ADC12 and DAC12.
63 DVSS power_in Digital supply voltage, negative terminal; supplies all digital parts.
64 AVCC power_in Analog supply voltage, positive terminal; supplies only the analog portion of ADC12 and DAC12.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package QFP-64(10x10)
Category Embedded Processors & Controllers
Pins 64

CAD (KiCad official)

  • Symbol: MSP430F155IPMR
  • Footprint: Package_QFP:LQFP-64_10x10mm_P0.5mm
  • 3D model: QFP-64(10x10) (KiCad packages3D, STEP)
  • 3D model files: msp430f155ipmr-etched.step / msp430f155ipmr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); msp430f155ipmr.step / msp430f155ipmr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (85 pp, sha256 697b9cb106833560, retrieved 2026-10-11, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF