component
MAX706TESA
Public Made by Adomby adom
lingxingic Supervisor And Reset ICs, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownMAX706TESA
lingxingic · Supervisor And Reset ICs · SOP-8
MAX706TESA from lingxingic, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | MRN | input | Active-low hardware reset input; holding it low holds RESETN low and resets the watchdog, with MRN low-level input voltage at most 0.8 V and high-level input voltage at least 3 V (VDD=5 V). |
| 2 | VDD | power_in | Supply voltage, 1 V to 5.5 V recommended (absolute maximum -0.3 V to 6.0 V); RESETN is valid for VDD above 1 V. |
| 3 | GND | power_in | Ground reference; all voltages are referenced to this pin. |
| 4 | PFI | input | Independent voltage detection input compared against an internal 1.25 V reference (1.20 V to 1.30 V), with input current at most 0.1 µA over 0 to VDD. |
| 5 | PFON | output | Independent voltage detection output that goes high when PFI is above 1.25 V and low when it is below; VOH at least 3.5 V at 800 µA and VOL at most 0.4 V at 3.2 mA. |
| 6 | WDI | input | Watchdog input; any rising or falling edge restarts the watchdog timer, a level held for about 1.6 s (typical) lets it time out, and leaving it floating disables the watchdog (VIH at least 3.5 V, VIL at most 0.8 V). |
| 7 | RESETN | output | Active-low power-supply reset output that goes low when VDD falls below the selected threshold VT and goes high about 200 ms (typical) after VDD rises above VT; it cannot guarantee a valid low below 1 V, so a 100 kΩ pull-down is recommended in that range. |
| 8 | WDON | output | Watchdog output that is high while WDI is toggling with RESETN high and goes low on watchdog timeout or during reset; VOH at least 3.5 V at 800 µA and VOL at most 0.4 V at 1.2 mA. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | lingxingic |
| Package | SOP-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage (absolute maximum) | VDD | -0.3 | 6 | V | 5 | ||
| Storage temperature | Tstg | -65 | 150 | ℃ | 5 | ||
| Soldering temperature (SOP) | TL | 260 | ℃ | 10 s, SOP | 5 | ||
| Input voltage range | VIN | -0.3 | V | 5 | |||
| Supply voltage (recommended) | VDD | 1 | 5.5 | V | 5 | ||
| Operating temperature | Tamb | -40 | 125 | ℃ | 5 | ||
| Supply voltage | VDD | 1 | 5.5 | V | 5 | ||
| Operating current | IDD | 50 | 150 | uA | 5 | ||
| Supply detection threshold voltage (T variant, 3.08 V) | VT | 3.013 | 3.08 | 3.147 | V | 5 | |
| Supply detection hysteresis voltage | Vhys | 40 | mV | 5 | |||
| Supply detection delay time | TRST | 120 | 200 | 280 | ms | 5 | |
| Watchdog reset time | TWD | 1 | 1.6 | 2.3 | s | 5 | |
| WDI high-level input current | IIWDI | 50 | 150 | uA | WDI=VDD | 5 | |
| WDI low-level input current | IIWDI | -150 | -50 | uA | WDI=0V | 5 | |
| WDI input high-level voltage | VIWDI | 3.5 | V | 5 | |||
| WDI input low-level voltage | 0.8 | V | 6 | ||||
| WDON output high-level voltage | VOWDON | 3.5 | V | Iload=800uA | 6 | ||
| WDON output low-level voltage | 0.4 | V | Iload=1.2mA | 6 | |||
| MRN low-level input current | IIMRN | 100 | 250 | 600 | uA | MRN=0V | 6 |
| MRN high-level input voltage | VIMRN | 3 | V | 6 | |||
| MRN low-level input voltage | 0.8 | V | 6 | ||||
| PFI input detection voltage | VTP | 1.2 | 1.25 | 1.3 | V | 6 | |
| PFI input current | IIPFI | 0.1 | uA | PFI=0～VDD | 6 | ||
| PFON output high-level voltage | VOPFO | 3.5 | V | Iload=800uA | 6 | ||
| PFON output low-level voltage | 0.4 | V | Iload=3.2mA | 6 |
CAD (KiCad official)
- Symbol:
MAX706TESA - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
max706tesa-etched.step/max706tesa-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);max706tesa.step/max706tesa.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: lingxingic datasheet (10 pp, sha256
02d33fd125ef351c, retrieved 2026-10-19, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).