component
SN74LS122DR
Public Made by Adomby adom
Texas Instruments Monostable Multivibrators, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSN74LS122DR
Texas Instruments · Monostable Multivibrators · SOIC-14
SN74LS122DR from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A1 | input | Gated active-low trigger input A1; the multivibrator triggers on a falling edge when the other inputs are in their enabling states. |
| 2 | A2 | input | Gated active-low trigger input A2; the multivibrator triggers on a falling edge when the other inputs are in their enabling states. |
| 3 | B1 | input | Gated active-high trigger input B1 with Schmitt hysteresis; the multivibrator triggers on a rising edge. |
| 4 | B2 | input | Gated active-high trigger input B2 with Schmitt hysteresis; the multivibrator triggers on a rising edge. |
| 5 | CLR | input | Active-low overriding clear input that terminates the output pulse. |
| 6 | Q̅ | output | Complementary (active-low) output of the monostable. |
| 7 | GND | power_in | Ground. |
| 8 | Q | output | True (active-high) output of the monostable. |
| 9 | Rint | passive | Internal timing resistor (nominally 10 kΩ); connect to VCC to use it, or leave open when using an external resistor. |
| 10 | NC | unconnected | No internal connection. |
| 11 | Cext | passive | External timing capacitor connection; the capacitor is connected between Cext and Rext/Cext (positive). |
| 12 | NC | unconnected | No internal connection. |
| 13 | Rext/Cext | passive | External timing resistor/capacitor node; the positive side of the timing capacitor connects here, and an external resistor can go to VCC with Rint open. |
| 14 | VCC | power_in | Positive supply voltage. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-14 |
| Category | Logic |
| Pins | 14 |
CAD (KiCad official)
- Symbol:
SN74LS122DR - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files:
sn74ls122dr-etched.step/sn74ls122dr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74ls122dr.step/sn74ls122dr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (32 pp, sha256
0b96374289001205, retrieved 2026-10-11, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).