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Contents

README

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PDTC143XU

Nexperia · Digital Transistors · SOT-323

PDTC143XU from Nexperia, in a SOT-323. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 I input Input (base) of the built-in bias network, with input voltage limits of -7 V to 20 V per the limiting values.
2 GND power_in Ground (emitter) of the transistor, the common reference for input and output.
3 O output Output (collector) of the transistor, rated for an output current of 100 mA and a collector-emitter voltage of 50 V maximum with open base.

Key specifications

Parameter Value
Manufacturer Nexperia
Package SOT-323
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Collector-base voltage VCBO 50 V open emitter 3
Collector-emitter voltage VCEO 50 V open base 3
Emitter-base voltage VEBO 7 V open collector 3
Input voltage VI -7 20 V 3
Output current IO 100 mA 3
Peak collector current ICM 100 mA tp ≤ 1 ms; single pulse 3
Total power dissipation Ptot 250 mW Tamb ≤ 25 °C; device mounted on FR4 PCB, single-sided, 35 µm copper, standard footprint 3
Junction temperature Tj 150 °C 3
Ambient temperature Tamb -65 150 °C 3
Storage temperature Tstg -65 150 °C 3
Thermal resistance from junction to ambient Rth(j-a) 625 K/W in free air; device mounted on FR4 PCB, single-sided, 35 µm copper, standard footprint 4
Collector-base breakdown voltage V(BR)CBO 50 V IC = 100 µA; IE = 0 A; Tamb = 25 °C 5
Collector-emitter breakdown voltage V(BR)CEO 50 V IC = 2 mA; IB = 0 A; Tamb = 25 °C 5
Collector-base cut-off current ICBO 100 nA VCB = 50 V; IE = 0 A; Tamb = 25 °C 5
Collector-emitter cut-off current ICEO 100 nA VCE = 30 V; IB = 0 A; Tamb = 25 °C 5
Collector-emitter cut-off current ICEO 5 µA VCE = 30 V; IB = 0 A; Tj = 150 °C 5
Emitter-base cut-off current IEBO 600 µA VEB = 5 V; IC = 0 A; Tamb = 25 °C 5
DC current gain hFE 50 VCE = 5 V; IC = 10 mA; Tamb = 25 °C 5
Collector-emitter saturation voltage VCEsat 100 mV IC = 10 mA; IB = 0.5 mA; Tamb = 25 °C 5
Off-state input voltage VI(off) 0.9 0.3 V VCE = 5 V; IC = 100 µA; Tamb = 25 °C 5
On-state input voltage VI(on) 2.5 1.5 V VCE = 0.3 V; IC = 20 mA; Tamb = 25 °C 5
Bias resistor 1 (input) R1 3.3 4.7 6.1 kΩ resistor test conditions per footnote [1] (Section 11, Table 8) 5
Bias resistor ratio R2/R1 1.7 2.1 2.6 resistor test conditions per footnote [1] (Section 11, Table 8) 5
Collector capacitance Cc 2.5 pF VCB = 10 V; IE = 0 A; ie = 0 A; f = 1 MHz; Tamb = 25 °C 5
Bias resistor 2 R2 10 kΩ nominal value as printed in part title and Table 8; no tolerance printed 7

CAD (KiCad official)

  • Symbol: PDTC143XU
  • Footprint: Package_TO_SOT_SMD:SOT-323_SC-70
  • 3D model: SOT-323 (KiCad packages3D, STEP)
  • 3D model files: pdtc143xu-etched.step / pdtc143xu-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); pdtc143xu.step / pdtc143xu.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (11 pp, sha256 e89d4d3e740c6e4b, retrieved 2026-10-18, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF