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Contents

README

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PSMN034-100BS

Nexperia · MOSFETs · D2PAK

PSMN034-100BS from Nexperia, in a D2PAK. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate. Standard-level gate drive input controlling channel conduction. Absolute V_GS = ±20 V; V_GS(th) typ. 3 V at 25 °C; internal gate resistance R_G ≈ 1 Ω at 1 MHz.
2 D passive Drain lead. Nexperia notes that this lead is cropped on the D2PAK (SOT404) package and it is not possible to make electrical connection to pin 2; the drain is instead brought out on the mounting base tab.
3 S passive Source. Channel current return; also the anode of the intrinsic body diode (I_S = 32 A continuous, I_SM = 127 A pulsed, T_mb = 25 °C).
mb D passive Mounting base (tab) - internally connected to the drain. Carries drain current (I_D up to 32 A at T_mb = 25 °C, V_DS = 100 V max) and serves as the primary thermal path; R_th(j-mb) ≈ 0.9 K/W typ.

Key specifications

Parameter Value
Manufacturer Nexperia
Package D2PAK
Category Transistors/Thyristors
Pins 4

Ordering variants

Same part, different packaging or reel option.

  • PSMN034-100BS

CAD (KiCad official)

  • Symbol: PSMN034-100BS
  • Footprint: Package_TO_SOT_SMD:TO-263-2
  • 3D model: D2PAK (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (14 pp, sha256 e1fcdeef01b5395a, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF