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XL3525Z

XINLUDA · AC-DC Controllers and Regulators · SOP-16

XL3525Z from XINLUDA, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 INV. INPUT input Inverting input of the internal error amplifier. Typically driven by the feedback network from the regulated output; used together with the N.I. INPUT to close the voltage control loop.
2 N.I. INPUT input Non-inverting input of the internal error amplifier. Common-mode input range includes the +5.1 V reference so it can be tied directly to VREF without external resistors.
3 SYNC input Oscillator sync input. Allows multiple XL3525 units to be slaved together or a single unit to be synchronized to an external system clock. Sync threshold ~2 V, sync input current ~1 mA at 3.5 V.
4 OSC. OUTPUT output Oscillator clock output. Provides the internal clock signal (~3.5 V amplitude, 0.5 µs typical clock width) that can be used to sync other devices or for external timing observation.
5 CT passive Oscillator timing capacitor terminal. Connect the timing capacitor CT (0.001 µF to 0.1 µF) from this pin to ground to set the oscillator frequency together with RT.
6 RT passive Oscillator timing resistor terminal. Connect timing resistor RT (2 kΩ to 150 kΩ) from this pin to VREF to set the oscillator frequency (100 Hz to 400 kHz range).
7 DISCHARGE passive Oscillator discharge terminal. A single resistor (0 to 500 Ω) between CT (pin 5) and this pin sets the oscillator dead-time / discharge time and provides adjustable dead-time control.
8 SOFT-START passive Soft-start capacitor terminal. An external capacitor to ground here is charged by an internal ~50 µA current source to implement soft-start; also acts as a pull-down shutdown input (sink ≥100 µA to disable outputs).
9 COMP output Error amplifier output / PWM comparator input (compensation node). Loop compensation network connects here; also accepts a pull-down (≥100 µA) to shut down the outputs. Output swing typ. 0.2 V (low) to 3.8 V (high).
10 SHUTDOWN input Active-high shutdown input (threshold ~0.8 V). A positive signal immediately sets the PWM latch to turn off the outputs and enables a ~150 µA sink that discharges the soft-start capacitor. Should not be left floating.
11 OUTPUT A output Totem-pole PWM driver output A. Sources/sinks in excess of 200 mA (peak 400 mA); alternates with OUTPUT B at half the oscillator frequency for push-pull drive. Powered from VC (pin 13).
12 GROUND power_in Device ground (0 V reference). Common return for the signal, control, and output driver stages.
13 VC power_in Collector supply for the output driver stages (4.5 V to 35 V, abs max 40 V). Powers OUTPUT A and OUTPUT B and is typically bypassed with a local capacitor.
14 OUTPUT B output Totem-pole PWM driver output B. Sources/sinks in excess of 200 mA (peak 400 mA); alternates with OUTPUT A at half the oscillator frequency for push-pull drive. Powered from VC (pin 13).
15 +Vi power_in Main input supply voltage (8 V to 35 V operating, abs max 40 V). Powers the internal reference, oscillator, error amplifier, and control logic. Typical standby current 14 mA.
16 VREF power_out On-chip +5.1 V reference output, trimmed to ±1%. Load capability up to 20 mA (short-circuit ~100 mA). Typically bypassed with 0.1 µF and used to bias RT and the error amplifier non-inverting input.

Key specifications

Parameter Value
Manufacturer XINLUDA
Package SOP-16
Category PMIC
Pins 16

Ordering variants

  • XL3525Z
  • XL3525ZXL3525K
  • XL3525ZXD3525

CAD (KiCad official)

  • Symbol: XL3525Z
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOP-16 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: XINLUDA datasheet (None pp, sha256 1a99ad128cc09d00, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

Symbol & Footprint

Schematic Symbol

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PCB Footprint

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