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Contents

README

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LM4132BMFX-4.1

Texas Instruments · Voltage Reference · SOT-23-5

LM4132BMFX-4.1 from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 N/C unconnected No-connect pin that should be left floating.
2 GND power_in Ground reference for the device.
3 EN input Enable pin: drive between 65% of VIN and VIN to enable VREF, or between 0 V and 35% of VIN to shut down (about 3 µA); it has an internal pullup of about 2 µA, may be left floating or tied to VIN, and must not be driven above VIN.
4 VIN power_in Input supply, which must be between VREF + 400 mV and 5.5 V (maximum input supply 5.5 V) and be bypassed with a input capacitor placed close to the device.
5 VREF power_out Precision reference output, rated for up to 20 mA load current for the LM4132 family and stable with low-ESR ceramic capacitors.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOT-23-5
Category Power Management (PMIC)
Pins 5

CAD (KiCad official)

  • Symbol: LM4132BMFX-4.1
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: lm4132bmfx-4-1-etched.step / lm4132bmfx-4-1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lm4132bmfx-4-1.step / lm4132bmfx-4-1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (44 pp, sha256 4bd8402ff026fdf1, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF