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CD74ACT08M96
Public Made by Adomby adom
Texas Instruments Logic Gates, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownCD74ACT08M96
Texas Instruments · Logic Gates · SOIC-14
CD74ACT08M96 from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Channel 1 input A of the quad 2-input AND gate; unused inputs must not float and must be tied to VCC or GND, with logic-high input at least 2 V and logic-low input at most 0.8 V. |
| 2 | 1B | input | Channel 1 input B of the quad 2-input AND gate; unused inputs must not float and must be tied to VCC or GND, with logic-high input at least 2 V and logic-low input at most 0.8 V. |
| 3 | 1Y | output | Channel 1 output Y, the AND of inputs 1A and 1B, rated for ±24 mA output drive current. |
| 4 | 2A | input | Channel 2 input A of the quad 2-input AND gate; unused inputs must not float and must be tied to VCC or GND, with logic-high input at least 2 V and logic-low input at most 0.8 V. |
| 5 | 2B | input | Channel 2 input B of the quad 2-input AND gate; unused inputs must not float and must be tied to VCC or GND, with logic-high input at least 2 V and logic-low input at most 0.8 V. |
| 6 | 2Y | output | Channel 2 output Y, the AND of inputs 2A and 2B, rated for ±24 mA output drive current. |
| 7 | GND | power_in | Ground reference for the device. |
| 8 | 3Y | output | Channel 3 output Y, the AND of inputs 3A and 3B, rated for ±24 mA output drive current. |
| 9 | 3A | input | Channel 3 input A of the quad 2-input AND gate; unused inputs must not float and must be tied to VCC or GND, with logic-high input at least 2 V and logic-low input at most 0.8 V. |
| 10 | 3B | input | Channel 3 input B of the quad 2-input AND gate; unused inputs must not float and must be tied to VCC or GND, with logic-high input at least 2 V and logic-low input at most 0.8 V. |
| 11 | 4Y | output | Channel 4 output Y, the AND of inputs 4A and 4B, rated for ±24 mA output drive current. |
| 12 | 4A | input | Channel 4 input A of the quad 2-input AND gate; unused inputs must not float and must be tied to VCC or GND, with logic-high input at least 2 V and logic-low input at most 0.8 V. |
| 13 | 4B | input | Channel 4 input B of the quad 2-input AND gate; unused inputs must not float and must be tied to VCC or GND, with logic-high input at least 2 V and logic-low input at most 0.8 V. |
| 14 | VCC | power_in | Positive supply, specified at 4.5 V to 5.5 V, with a 0.1 µF bypass capacitor recommended close to the pin. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-14 |
| Category | Logic |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage range | VCC | -0.5 | 6 | V | 4 | ||
| Input clamp current | IIK | -20 | 20 | mA | VI < 0 or VI > VCC | 4 | |
| Output clamp current | IOK | -50 | 50 | mA | VO < 0 or VO > VCC | 4 | |
| Continuous output current | IO | -50 | 50 | mA | VO = 0 to VCC | 4 | |
| Continuous current through VCC or GND | -100 | 100 | mA | 4 | |||
| Storage temperature range | Tstg | -65 | 150 | °C | 4 | ||
| ESD HBM classification level 2 | V(ESD) | -2000 | 2000 | V | Human body model (HBM), per AEC Q100-002 | 4 | |
| Supply voltage | VCC | 4.5 | 5.5 | V | TA = -55°C to 125°C | 4 | |
| High-level input voltage | VIH | 2 | V | TA = -55°C to 125°C | 4 | ||
| Low-level input voltage | VIL | 0.8 | V | TA = -55°C to 125°C | 4 | ||
| Input voltage | VI | 0 | V | Maximum is VCC; TA = -55°C to 125°C | 4 | ||
| Output voltage | VO | 0 | V | Maximum is VCC; TA = -55°C to 125°C | 4 | ||
| High-level output current | IOH | -24 | mA | TA = -55°C to 125°C | 4 | ||
| Low-level output current | IOL | 24 | mA | TA = -55°C to 125°C | 4 | ||
| Input transition rise or fall rate | Δt/Δv | 10 | ns/V | TA = -55°C to 125°C | 4 | ||
| Junction-to-ambient thermal resistance | RθJA | 119.9 | °C/W | D (SOIC) package, 14 pin | 4 | ||
| High-level output voltage, IOH = -50µA | VOH | 4.4 | V | VI = VIH or VIL, IOH = -50µA, VCC = 4.5V, TA = -55°C to 125°C | 5 | ||
| High-level output voltage, IOH = -24mA | VOH | 3.7 | V | VI = VIH or VIL, IOH = -24mA, VCC = 4.5V, TA = -55°C to 125°C | 5 | ||
| Low-level output voltage, IOL = 50µA | VOL | 0.1 | V | VI = VIH or VIL, IOL = 50µA, VCC = 4.5V, TA = -55°C to 125°C | 5 | ||
| Low-level output voltage, IOL = 24mA | VOL | 0.5 | V | VI = VIH or VIL, IOL = 24mA, VCC = 4.5V, TA = -55°C to 125°C | 5 | ||
| Input current | II | -1 | 1 | µA | VI = VCC or GND, VCC = 5.5V, TA = -55°C to 125°C | 5 | |
| Quiescent supply current | ICC | 80 | µA | VI = VCC or GND, IO = 0, VCC = 5.5V, TA = -55°C to 125°C | 5 | ||
| Additional supply current per input pin | ΔICC | 3 | mA | VI = VCC − 2.1V, VCC = 4.5V to 5.5V, TA = -55°C to 125°C | 5 | ||
| Propagation delay, A or B to Y (tPLH) | tPLH | 3.2 | 12.9 | ns | VCC = 5V ± 0.5V, CL = 50pF, TA = -55°C to 125°C | 5 | |
| Propagation delay, A or B to Y (tPHL) | tPHL | 3.2 | 12.9 | ns | VCC = 5V ± 0.5V, CL = 50pF, TA = -55°C to 125°C | 5 |
CAD (KiCad official)
- Symbol:
CD74ACT08M96 - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files:
cd74act08m96-etched.step/cd74act08m96-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cd74act08m96.step/cd74act08m96.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (21 pp, sha256
38053fb75beeea73, retrieved 2026-10-18, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).