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SN74AHC595PWR
Public Made by Adomby adom
Texas Instruments Shifting Register, TSSOP-16. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSN74AHC595PWR
Texas Instruments · Shifting Register · TSSOP-16
SN74AHC595PWR from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | QB | tri_state | 3-state parallel output QB from the storage register. Driven when OE is low; high-impedance when OE is high. |
| 2 | QC | tri_state | 3-state parallel output QC from the storage register. Driven when OE is low; high-impedance when OE is high. |
| 3 | QD | tri_state | 3-state parallel output QD from the storage register. Driven when OE is low; high-impedance when OE is high. |
| 4 | QE | tri_state | 3-state parallel output QE from the storage register. Driven when OE is low; high-impedance when OE is high. |
| 5 | QF | tri_state | 3-state parallel output QF from the storage register. Driven when OE is low; high-impedance when OE is high. |
| 6 | QG | tri_state | 3-state parallel output QG from the storage register. Driven when OE is low; high-impedance when OE is high. |
| 7 | QH | tri_state | 3-state parallel output QH (MSB) from the storage register. Driven when OE is low; high-impedance when OE is high. |
| 8 | GND | power_in | Ground reference (0 V) for the device. |
| 9 | QH' | output | Serial output from the shift register (not 3-state). Provides the QH bit of the shift register for cascading to the SER input of the next device; remains active regardless of OE. |
| 10 | SRCLR | input | Active-low shift-register clear. When held low, asynchronously clears the 8-bit shift register; direct overriding clear input. |
| 11 | SRCLK | input | Shift-register clock input. On the rising edge, data at SER is shifted into the 8-bit shift register. |
| 12 | RCLK | input | Storage-register (latch) clock input. On the rising edge, the contents of the shift register are transferred in parallel into the 8-bit storage register that drives QA-QH. |
| 13 | OE | input | Active-low output enable. When low, the QA-QH parallel outputs are driven; when high, QA-QH go to the high-impedance state (QH' is unaffected). |
| 14 | SER | input | Serial data input to the 8-bit shift register. Sampled on the rising edge of SRCLK. |
| 15 | QA | tri_state | 3-state parallel output QA (LSB) from the storage register. Driven when OE is low; high-impedance when OE is high. |
| 16 | VCC | power_in | Positive supply voltage, 2 V to 5.5 V. Bypass with a local decoupling capacitor to GND. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-16 |
| Category | Logic |
| Pins | 16 |
Ordering variants
Same part, different packaging or reel option.
SN74AHC595PWRSN74AHC595PWRDSN74AHC595PWRDRSN74AHC595PWRDBSN74AHC595PWRDBRSN74AHC595PWRNSN74AHC595PWRBQBSN74AHC595PWRBQBR
CAD (KiCad official)
- Symbol:
SN74AHC595PWR - Footprint:
Package_SO:TSSOP-16_4.4x5mm_P0.65mm - 3D model: TSSOP-16 (KiCad packages3D, STEP)
- 3D model files:
sn74ahc595pwr-etched.step/sn74ahc595pwr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74ahc595pwr.step/sn74ahc595pwr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (37 pp, sha256
1e613ac5023fa091, retrieved 2026-08-17, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).