component
93LC56C-E
Public Made by Adomby adom
Microchip Tech Pre-ordered Chips, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdown93LC56C-E
Microchip Tech · Pre-ordered Chips · SOIC-8
93LC56C-E from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CS | input | A high level selects the device and a low level deselects it into Standby mode, and CS must be low for 250 ns minimum (TCSL) between consecutive instructions. |
| 2 | CLK | input | Opcodes, address and data bits are clocked in on the positive edge of CLK, and data bits are clocked out on the positive edge of CLK. |
| 3 | DI | input | Data In clocks in a Start bit, opcode, address and data synchronously with the CLK input. |
| 4 | DO | output | Data Out outputs data synchronously with CLK in Read mode (TPD after the positive edge of CLK) and also provides Ready/Busy status during erase and write cycles when CS is brought high after being low for TCSL. |
| 5 | VSS | power_in | Ground reference pin for the device. |
| 6 | ORG | input | When tied to VCC or logic HI the x16 organization is selected, and when tied to VSS or logic LO the x8 organization is selected, so ORG must be tied to a valid logic level. |
| 7 | NC | unconnected | No internal connection. |
| 8 | VCC | power_in | Power supply pin. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOIC-8 |
| Category | Interface ICs |
| Pins | 8 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | SOT-23, 8-lead 2x3 DFN/TDFN and 8-lead TSSOP. All packages are Pb-free (Matte Tin) finish. | 1 |
CAD (KiCad official)
- Symbol:
93LC56C-E - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
93lc56c-e-etched.step/93lc56c-e-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);93lc56c-e.step/93lc56c-e.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (36 pp, sha256
b9ca09e91a99beef, retrieved 2026-10-26, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusoff(skipped (clean text read)), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).