component
XD14016
Public Made by Adomby adom
XINLUDA Analog Switches, Multiplexers, DIP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownXD14016
XINLUDA · Analog Switches, Multiplexers · DIP-14
XD14016 from XINLUDA, in a DIP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN 1 | bidirectional | Switch 1 signal terminal, bilateral with OUT 1, must stay between VSS and VDD. |
| 2 | OUT 1 | bidirectional | Switch 1 signal terminal, bilateral with IN 1, must stay between VSS and VDD. |
| 3 | OUT 2 | bidirectional | Switch 2 signal terminal, bilateral with IN 2, must stay between VSS and VDD. |
| 4 | IN 2 | bidirectional | Switch 2 signal terminal, bilateral with OUT 2, must stay between VSS and VDD. |
| 5 | CONTROL 2 | input | Control input for switch 2; VSS turns the switch off and VDD turns it on. |
| 6 | CONTROL 3 | input | Control input for switch 3; VSS turns the switch off and VDD turns it on. |
| 7 | VSS | power_in | Negative supply (ground reference); voltages are referenced to VSS and it is the control logic-low level. |
| 8 | IN 3 | bidirectional | Switch 3 signal terminal, bilateral with OUT 3, must stay between VSS and VDD. |
| 9 | OUT 3 | bidirectional | Switch 3 signal terminal, bilateral with IN 3, must stay between VSS and VDD. |
| 10 | OUT 4 | bidirectional | Switch 4 signal terminal, bilateral with IN 4, must stay between VSS and VDD. |
| 11 | IN 4 | bidirectional | Switch 4 signal terminal, bilateral with OUT 4, must stay between VSS and VDD. |
| 12 | CONTROL 4 | input | Control input for switch 4; VSS turns the switch off and VDD turns it on. |
| 13 | CONTROL 1 | input | Control input for switch 1; VSS turns the switch off and VDD turns it on. |
| 14 | VDD | power_in | Positive supply, 3.0 Vdc to 18 Vdc range (absolute maximum -0.5 to +18.0 V); it is the control logic-high level. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | XINLUDA |
| Package | DIP-14 |
| Category | Interface |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| DC Supply Voltage | VDD | -0.5 | 18 | V | Referenced to VSS | 1 | |
| Input or Output Voltage (DC or Transient) | Vin,Vout | -0.5 | V | DC or transient; upper limit printed as VDD+0.5 | 1 | ||
| Input Current (DC or Transient), per Control Pin | Iin | -10 | 10 | mA | DC or transient, per control pin | 1 | |
| Switch Through Current | lSW | -25 | 25 | mA | 1 | ||
| Power Dissipation | PD | 500 | mW | Per package | 1 | ||
| Storage Temperature | Tstg | -65 | 150 | ℃ | 1 | ||
| Lead Temperature | TL | 260 | ℃ | 8-second soldering | 1 | ||
| DC Supply Voltage (features) | VDD | 3 | 18 | V | Supply voltage range per Features section | 1 | |
| Recommended maximum VDD - VSS | 15 | V | Most parameters specified up to 15 V | 8 | |||
| Operating Temperature (ordering table) | 0 | 70 | ℃ | Printed as -0 to 70 in ordering information | 9 | ||
| Quiescent Current (Per Package) | IDD | 0.0005 | 0.25 | μAdc | VDD 5.0 Vdc | 3 | |
| Quiescent Current (Per Package) | IDD | 0.001 | 0.5 | μAdc | VDD 10 Vdc | 3 | |
| Quiescent Current (Per Package) | IDD | 0.0015 | 1 | μAdc | VDD 15 Vdc | 3 | |
| Input Current, Control | Iin | -0.1 | 1e-05 | 0.1 | μAdc | VDD 15 Vdc | 3 |
| Input/Output Leakage Current | -0.1 | 0.0015 | 0.1 | μAdc | Vc=Vss; Vin=+7.5, Vout=-7.5 Vdc; VDD 7.5 Vdc | 3 | |
| Propagation Delay Time, Vin to Vout | tPLH, tPHL | 15 | 45 | ns | VDD 5.0 Vdc; Vss=0 Vdc; Vc=VDD, RL=10 kΩ; CL=50 pF | 4 | |
| Propagation Delay Time, Vin to Vout | tPLH, tPHL | 7 | 15 | ns | VDD 10 Vdc; Vss=0 Vdc; Vc=VDD, RL=10 kΩ; CL=50 pF | 4 | |
| Propagation Delay Time, Vin to Vout | tPLH, tPHL | 6 | 12 | ns | VDD 15 Vdc; Vss=0 Vdc; Vc=VDD, RL=10 kΩ; CL=50 pF | 4 | |
| Propagation Delay Time, Control to Output | tPHZ, tPLZ, tPZH, tPZL | 34 | 90 | ns | VDD 5.0 Vdc; Vss=0 Vdc; Vin≤10 Vdc, RL=10 kΩ; CL=50 pF | 4 | |
| Propagation Delay Time, Control to Output | tPHZ, tPLZ, tPZH, tPZL | 20 | 45 | ns | VDD 10 Vdc; Vss=0 Vdc; Vin≤10 Vdc, RL=10 kΩ; CL=50 pF | 4 | |
| Propagation Delay Time, Control to Output | tPHZ, tPLZ, tPZH, tPZL | 15 | 35 | ns | VDD 15 Vdc; Vss=0 Vdc; Vin≤10 Vdc, RL=10 kΩ; CL=50 pF | 4 |
CAD (KiCad official)
- Symbol:
XD14016 - Footprint:
Package_DIP:DIP-14_W7.62mm - 3D model: DIP-14 (KiCad packages3D, STEP)
- 3D model files:
xd14016-etched.step/xd14016-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);xd14016.step/xd14016.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: XINLUDA datasheet (9 pp, sha256
1e926aa170034aa8, retrieved 2026-10-15, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).