component
FD2024S
Public Made by Adomby adom
Fortior Tech Gate Drivers, SOT-23-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownFD2024S
Fortior Tech · Gate Drivers · SOT-23-6
FD2024S from Fortior Tech, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT1 | output | Output signal 1 of the first low-side gate driver channel, which follows IN1 in phase, with a source/sink pulse current of about 1.2 A / -1.3 A and an output voltage range of 0 V to VCC. |
| 2 | COM | power_in | Ground reference for the device; all voltages in the datasheet are referenced to COM, and the absolute maximum rating for pins is -0.3 V to VCC+0.3 V for outputs. |
| 3 | OUT2 | output | Output signal 2 of the second low-side gate driver channel, which follows IN2 in phase, with a source/sink pulse current of about 1.2 A / -1.3 A and an output voltage range of 0 V to VCC. |
| 4 | IN2 | input | Logic input 2 for the second driver channel, compatible with 3.3 V and 5 V logic, with a recommended input range of 0 V to 6.0 V (absolute maximum -0.3 V to 6.5 V). |
| 5 | IN1 | input | Logic input 1 for the first driver channel, compatible with 3.3 V and 5 V logic, with a recommended input range of 0 V to 6.0 V (absolute maximum -0.3 V to 6.5 V). |
| 6 | VCC | power_in | Supply voltage for the driver, recommended 4.0 V to 18 V (absolute maximum -0.3 V to 25 V), with internal undervoltage lockout (UVLO) that trips at 3.5 V typical. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Fortior Tech |
| Package | SOT-23-6 |
| Category | Motor Driver ICs |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | -0.3 | 25 | V | 2 | ||
| Output voltage (OUT1, OUT2) | VOUT | -0.3 | V | 2 | |||
| Logic input voltage (IN1, IN2) | VIN | -0.3 | 6.5 | V | 2 | ||
| Power dissipation SOT23-6 | PD | 0.625 | W | TA<=25C | 2 | ||
| Junction-to-ambient thermal resistance SOT23-6 | RthJA | 200 | C/W | 2 | |||
| Junction temperature range | Tj | 150 | C | 2 | |||
| Storage temperature range | Tstg | -55 | 150 | C | 2 | ||
| Supply voltage | VCC | 4 | 18 | V | 2 | ||
| Output voltage (OUT1, OUT2) | VOUT | 0 | V | 2 | |||
| Logic input voltage (IN1, IN2) | VIN | 0 | 6 | V | 2 | ||
| Ambient temperature | TA | -40 | 125 | C | 2 | ||
| VCC quiescent current | IQCC | 0.7 | 1 | mA | IN1=IN2=0 | 2 | |
| IN high-level input threshold voltage | VIH | 2.2 | 2.8 | V | 2 | ||
| IN low-level input threshold voltage | VIL | 0.8 | 1.5 | V | 2 | ||
| IN high-level input bias current | IIN+ | 70 | 120 | 200 | μA | VIN=5V | 2 |
| IN low-level input bias current | IIN- | 2 | μA | VIN=0V | 2 | ||
| VCC undervoltage protection trip voltage (rising) | VCCUV+ | 3 | 3.5 | 4 | V | 2 | |
| VCC undervoltage protection reset voltage (falling) | VCCUV- | 2.8 | 3.3 | 3.8 | V | 2 | |
| VCC undervoltage protection hysteresis voltage | VCCUVH | 0.2 | V | 2 | |||
| High-level output voltage | VOH | 80 | 130 | mV | IO=-10mA | 2 | |
| Low-level output voltage | VOL | 30 | 50 | mV | IO=10mA | 2 | |
| High-level output short-circuit pulse current | IOH | 0.7 | 1.2 | A | VO=0V, VIN=5V | 2 | |
| Low-level output short-circuit pulse current | IOL | 0.8 | 1.3 | A | VO=15V, VIN=0V | 2 | |
| Output rising-edge propagation time | ton | 40 | 80 | ns | 2 | ||
| Output falling-edge propagation time | toff | 40 | 80 | ns | 2 | ||
| Output rise time | tr | 25 | 50 | ns | CL=1000pF | 2 | |
| Output fall time | tf | 25 | 50 | ns | CL=1000pF | 2 |
CAD (KiCad official)
- Symbol:
FD2024S - Footprint:
Package_TO_SOT_SMD:SOT-23-6 - 3D model: SOT-23-6 (KiCad packages3D, STEP)
- 3D model files:
fd2024s-etched.step/fd2024s-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);fd2024s.step/fd2024s.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Fortior Tech datasheet (6 pp, sha256
f1f82a00cc2b26c4, retrieved 2026-10-18, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).