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Contents

README

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SI2301CDS-T1-GE3

Vishay Intertech · MOSFETs · SOT-23

SI2301CDS-T1-GE3 from Vishay Intertech, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Gate input Gate terminal; apply control voltage between ±8 V relative to source to modulate drain-source conduction.
2 Source passive Source terminal serving as reference for gate-source voltage control and supporting continuous source-drain diode current up to 1.3 A at TC = 25°C.
3 Drain passive Drain terminal rated for maximum drain-source voltage of 20 V and continuous drain current of 3.1 A at TC = 25°C.

Key specifications

Parameter Value
Manufacturer Vishay Intertech
Package SOT-23
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Voltage VDS -20 V 1
Gate-Source Voltage VGS -8 8 V 1
Continuous Drain Current ID -3.1 A TJ = 150 °C, TC = 25 °C 1
Continuous Drain Current ID -2.5 A TJ = 150 °C, TC = 70 °C 1
Continuous Drain Current ID -2.3 A TJ = 150 °C, TA = 25 °C (notes b, c) 1
Continuous Drain Current ID -1.8 A TJ = 150 °C, TA = 70 °C (notes b, c) 1
Pulsed Drain Current IDM -10 A 1
Continuous Source-Drain Diode Current IS -1.3 A TC = 25 °C 1
Continuous Source-Drain Diode Current IS -0.72 A TA = 25 °C (notes b, c) 1
Maximum Power Dissipation PD 1.6 W TC = 25 °C 1
Maximum Power Dissipation PD 1 W TC = 70 °C 1
Maximum Power Dissipation PD 0.86 W TA = 25 °C (notes b, c) 1
Maximum Power Dissipation PD 0.55 W TA = 70 °C (notes b, c) 1
Operating Junction and Storage Temperature Range TJ, Tstg -55 150 °C 1
Maximum Junction-to-Ambient, 5 s RthJA 120 145 °C/W 5 s (notes b, d) 1
Maximum Junction-to-Ambient, steady state RthJA 175 °C/W Steady state (note d) 1
Maximum Junction-to-Foot (Drain), steady state RthJF 62 78 °C/W Steady state 1
Drain-Source Breakdown Voltage VDS -20 V VGS = 0 V, ID = - 250 µA 2
Gate-Source Threshold Voltage VGS(th) -0.4 -1 V VDS = VGS, ID = - 250 µA 2
Gate-Source Leakage IGSS -100 100 nA VDS = 0 V, VGS = ± 8 V 2
Zero Gate Voltage Drain Current IDSS -1 µA VDS = - 20 V, VGS = 0 V 2
Zero Gate Voltage Drain Current IDSS -10 µA VDS = - 20 V, VGS = 0 V, TJ = 55 °C 2
On-State Drain Current ID(on) -6 A VDS - 5 V, VGS = - 4.5 V 2
Drain-Source On-State Resistance RDS(on) 0.09 0.112 Ω VGS = - 4.5 V, ID = - 2.8 A 2
Drain-Source On-State Resistance RDS(on) 0.11 0.142 Ω VGS = - 2.5 V, ID = - 2.0 A 2
Total Gate Charge Qg 5.5 10 nC VDS = - 10 V, VGS = - 4.5 V, ID = - 3 A 2
Total Gate Charge Qg 3.3 6 nC VDS = - 10 V, VGS = - 2.5 V, ID = - 3 A 2
Turn-On Delay Time td(on) 11 20 ns VDD = - 10 V, RL = 10 Ω, ID = - 1 A, VGEN = - 4.5 V, Rg = 1 Ω 2
Rise Time tr 35 60 ns VDD = - 10 V, RL = 10 Ω, ID = - 1 A, VGEN = - 4.5 V, Rg = 1 Ω 2
Turn-Off Delay Time td(off) 30 50 ns VDD = - 10 V, RL = 10 Ω, ID = - 1 A, VGEN = - 4.5 V, Rg = 1 Ω 2
Fall Time tf 10 20 ns VDD = - 10 V, RL = 10 Ω, ID = - 1 A, VGEN = - 4.5 V, Rg = 1 Ω 2
Body Diode Voltage VSD -0.8 -1.2 V IS = - 0.7 A 2
Body Diode Reverse Recovery Time trr 30 50 ns IF = - 3.0 A, dI/dt = 100 A/µs, TJ = 25 °C 2
Body Diode Reverse Recovery Charge Qrr 25 50 nC IF = - 3.0 A, dI/dt = 100 A/µs, TJ = 25 °C 2

CAD (KiCad official)

  • Symbol: SI2301CDS-T1-GE3
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)
  • 3D model files: si2301cds-t1-ge3-etched.step / si2301cds-t1-ge3-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); si2301cds-t1-ge3.step / si2301cds-t1-ge3.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Vishay Intertech datasheet (9 pp, sha256 54dbab870c4de746, retrieved 2026-09-22, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF