component
ATTINY412-SSF
Public Made by Adomby adom
Microchip Tech Microcontrollers (MCU/MPU/SOC), SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownATTINY412-SSF
Microchip Tech · Microcontrollers (MCU/MPU/SOC) · SOIC-8
ATTINY412-SSF from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD | power_in | Input supply pin; the operating supply voltage is 2.7 V to 5.5 V (Table 36-2). |
| 2 | PA6 | bidirectional | Port A pin 6 general-purpose I/O, also providing ADC0 AIN6, AC0 AINN0 input, DAC0 OUT (PA6 is the DAC0 output pin), and alternate-position USART0 TxD and SPI0 MOSI functions. |
| 3 | PA7 | bidirectional | Port A pin 7 general-purpose I/O, also providing ADC0 AIN7, AC0 AINP0 input, alternate-position USART0 RxD and SPI0 MISO functions, and LUT1-OUT CCL output. |
| 4 | PA1 | bidirectional | Port A pin 1 general-purpose I/O, also providing ADC0 AIN1 input, USART0 TxD (alternate position), SPI0 MOSI, TWI0 SDA, and TCA0 WO1 output. |
| 5 | PA2 | bidirectional | Port A pin 2 general-purpose I/O, also providing EVSYS EVOUT0 event output, ADC0 AIN2 input, USART0 RxD (alternate position), SPI0 MISO, TWI0 SCL, and TCA0 WO2 output. |
| 6 | PA0/RESET/UPDI | bidirectional | Port A pin 0 that is configured as RESET or UPDI by the RSTPINCFG fuse (GPIO, UPDI, or RESET), providing the single-pin Unified Program and Debug Interface when set to UPDI, and also ADC0 AIN0 input and CCL LUT0-IN0. |
| 7 | PA3/EXTCLK | bidirectional | Port A pin 3 general-purpose I/O, also serving as the EXTCLK external clock input, ADC0 AIN3 input, USART0 XCK, SPI0 SCK, and TCA0 WO0/WO3 waveform output. |
| 8 | GND | power_in | Ground reference pin for the device. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOIC-8 |
| Category | Embedded Processors & Controllers |
| Pins | 8 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | Pin Count Package Type Drawing Number Style 8 SOIC C04-00057 SN | 540 |
CAD (KiCad official)
- Symbol:
ATTINY412-SSF - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
attiny412-ssf-etched.step/attiny412-ssf-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);attiny412-ssf.step/attiny412-ssf.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (553 pp, sha256
7cd19d54679f6f5a, retrieved 2026-10-21, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).