component
PIC12F1840T-E
Public Made by Adomby adom
Microchip Tech Microcontroller Units (MCUs/MPUs/SOCs), SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownPIC12F1840T-E
Microchip Tech · Microcontroller Units (MCUs/MPUs/SOCs) · SOP-8
PIC12F1840T-E from Microchip Tech, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD | power_in | Positive supply, 2.3V-5.5V for PIC12F1840 (1.8V-3.6V for PIC12LF1840). |
| 2 | RA5 | bidirectional | General purpose I/O (TTL input, CMOS output) multiplexed with external clock input CLKIN, crystal OSC1, Timer1 oscillator T1OSI, Timer1 clock T1CKI, SR latch inverting output SRNQ, and alternate P1A/CCP1/DT/RX. |
| 3 | RA4 | bidirectional | General purpose I/O (TTL input, CMOS output) multiplexed with ADC channel AN3, capacitive sensing input CPS3, crystal OSC2, FOSC/4 CLKOUT, Timer1 oscillator T1OSO, comparator input C1IN1-, CLKR, T1G, modulator carrier input MDCIN2 and alternate SDO/CK/TX/P1B. |
| 4 | RA3/MCLR/VPP/SS/T1G | input | Input-only pin: general purpose input, Master Clear with internal weak pull-up, high-voltage programming input VPP, Slave Select SS and Timer1 gate T1G. |
| 5 | RA2 | bidirectional | General purpose I/O (Schmitt Trigger input, CMOS output) multiplexed with ADC channel AN2, CPS2, comparator C1 output, SR latch output SRQ, Timer0 clock T0CKI, CCP1/P1A PWM, FLT0 fault input, I2C SDA, SPI SDI, external interrupt INT and modulator carrier input MDCIN1. |
| 6 | RA1/ICSPCLK | bidirectional | General purpose I/O multiplexed with ADC channel AN1, CPS1, VREF positive reference input for ADC and DAC, comparator input C1IN0-, SR latch input SRI, EUSART RX/DT, I2C SCL, SPI SCK, modulator source input MDMIN, and ICSP clock ICSPCLK. |
| 7 | RA0/ICSPDAT | bidirectional | General purpose I/O multiplexed with ADC channel AN0, CPS0, comparator positive input C1IN+, DAC output DACOUT, EUSART TX/CK, SPI SDO, SS, PWM P1B, modulator output MDOUT, and ICSP data ICSPDAT. |
| 8 | VSS | power_in | Ground reference. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOP-8 |
| Category | Single Chip Microcomputer/Microcontroller |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage (FOSC ≤ 16 MHz) | VDD | 2.3 | 5.5 | V | FOSC ≤ 16 MHz | 305 | |
| Supply Voltage (FOSC ≤ 32 MHz) | VDD | 2.5 | 5.5 | V | FOSC ≤ 32 MHz | 305 | |
| RAM Data Retention Voltage | VDR | 1.7 | V | Device in Sleep mode | 305 | ||
| FVR Voltage for ADC | VADFVR | -8 | 6 | % | 1.024V, VDD ≥ 2.5V; 2.048V, VDD ≥ 2.5V; 4.096V, VDD ≥ 4.75V | 305 | |
| FVR Voltage for Comparator and DAC | VCDAFVR | -11 | 7 | % | 1.024V, VDD ≥ 2.5V; 2.048V, VDD ≥ 2.5V; 4.096V, VDD ≥ 4.75V | 305 | |
| VDD Rise Rate for internal POR | SVDD | 0.05 | V/ms | 305 | |||
| Power-on Reset Release Voltage | VPOR | 1.6 | V | 305 | |||
| Power-on Reset Rearm Voltage | VPORR | 1.5 | V | 305 | |||
| Ambient temperature under bias | -40 | 125 | °C | 302 | |||
| Storage temperature | -65 | 150 | °C | 302 | |||
| Voltage on VDD with respect to VSS, PIC12F1840 | VDD | -0.3 | 6.5 | V | 302 | ||
| Voltage on MCLR with respect to VSS | -0.3 | 9 | V | 302 | |||
| Maximum current out of VSS pin | 70 | mA | -40°C ≤ TA ≤ +125°C for extended | 302 | |||
| Maximum current into VDD pin | 70 | mA | -40°C ≤ TA ≤ +125°C for extended | 302 | |||
| Clamp current | IK | 20 | mA | VPIN < 0 or VPIN > VDD | 302 | ||
| Input Low Voltage, TTL buffer | VIL | 0.8 | V | 4.5V ≤ VDD ≤ 5.5V | 312 | ||
| Input Low Voltage, SMBus levels | VIL | 0.8 | V | 2.7V ≤ VDD ≤ 5.5V | 312 | ||
| Input High Voltage, TTL buffer | VIH | 2 | V | 4.5V ≤ VDD ≤ 5.5V | 312 | ||
| Input High Voltage, SMBus levels | VIH | 2.1 | V | 2.7V ≤ VDD ≤ 5.5V | 312 | ||
| Input Leakage Current, I/O Ports | IIL | -125 | 125 | nA | VSS ≤ VPIN ≤ VDD, Pin at high impedance, 85°C | 312 | |
| Input Leakage Current, MCLR | IIL | -200 | 200 | nA | VSS ≤ VPIN ≤ VDD, Pin at high impedance, 85°C | 312 | |
| Weak Pull-up Current | IPUR | 25 | 100 | 200 | µA | VDD = 3.3V, VPIN = VSS | 312 |
| Weak Pull-up Current | IPUR | 25 | 140 | 300 | µA | VDD = 5.0V, VPIN = VSS | 312 |
| Output Low Voltage, I/O Ports | VOL | 0.6 | V | IOL = 8 mA, VDD = 5V; IOL = 6 mA, VDD = 3.3V; IOL = 1.8 mA, VDD = 1.8V | 312 | ||
| Capacitive load, I/O pins | CIO | 50 | pF | 313 | |||
| Power-down Base Current | IPD | 0.2 | 10 | µA | VDD = 2.3V, WDT, BOR, FVR and T1OSC disabled; max at +125°C | 310 | |
| Power-down Base Current | IPD | 0.5 | 15 | µA | VDD = 5.0V, WDT, BOR, FVR and T1OSC disabled; max at +125°C | 310 | |
| Supply Current, HFINTOSC 16 MHz | IDD | 1.3 | 2.1 | mA | FOSC = 16 MHz HFINTOSC, VDD = 5.0V | 308 | |
| Voltage on MCLR/VPP pin (high-voltage programming) | VIHH | 8 | 9 | V | 314 | ||
| Internal Calibrated HFINTOSC Frequency, ±5% | HFOSC | -5 | 5 | % | -40°C ≤ TA ≤ +125°C | 318 | |
| Internal Calibrated HFINTOSC Frequency, ±2% | HFOSC | -2 | 2 | % | 0°C ≤ TA ≤ +60°C, VDD ≥ 2.5V | 318 | |
| Brown-out Reset Voltage | VBOR | 2.55 | 2.7 | 2.85 | V | BORV = 0 | 321 |
| Brown-out Reset Voltage | VBOR | 2.35 | 2.45 | 2.58 | V | BORV = 1, PIC12F1840 | 321 |
| Brown-out Reset Hysteresis | VHYST | 0 | 25 | 75 | mV | -40°C to +85°C | 321 |
| ADC Resolution | NR | 10 | bit | 323 | |||
| ADC Integral Error | EIL | 1 | 1.7 | LSb | VREF = 3.0V | 323 | |
| ADC Offset Error | EOFF | 1 | 2.5 | LSb | VREF = 3.0V | 323 | |
| ADC Gain Error | EGN | 1 | 2 | LSb | VREF = 3.0V | 323 | |
| ADC Reference Voltage | VREF | 1.8 | V | VREF = (VREF+ minus VREF-) | 323 | ||
| Comparator Input Offset Voltage | VIOFF | -60 | 60 | mV | CxSP = 1, VICM = VDD/2 | 326 | |
| Thermal Resistance Junction to Ambient | θJA | 149.5 | °C/W | 8-pin SOIC package | 315 | ||
| Thermal Resistance Junction to Case | θJC | 39.9 | °C/W | 8-pin SOIC package | 315 | ||
| Maximum Junction Temperature | TJMAX | 150 | °C | 315 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | SN = SOIC, 8-Lead Pattern: QTP, SQTP, Code or Special Requirements | 395 |
CAD (KiCad official)
- Symbol:
PIC12F1840T-E - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
pic12f1840t-e-etched.step/pic12f1840t-e-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);pic12f1840t-e.step/pic12f1840t-e.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (397 pp, sha256
79e88d8e63728e96, retrieved 2026-10-24, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).