component
XL2113PBF
Public Made by Adomby adom
XINLUDA Gate Drivers, DIP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownXL2113PBF
XINLUDA · Gate Drivers · DIP-14
XL2113PBF from XINLUDA, in a DIP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | LO | output | Low side gate drive output, swings 0 to VCC. |
| 2 | COM | power_in | Low side return (ground reference for VCC and LO); all absolute voltage ratings are referenced to COM. |
| 3 | VCC | power_in | Low side fixed supply, recommended 10 to 20V (absolute max 25V), with undervoltage lockout. |
| 4 | NC | unconnected | Pin 4 is shown without a signal name in the DIP14 lead assignment (no pin is present in the lead definitions). |
| 5 | VS | power_in | High side floating supply return (offset voltage), operating up to 600V for XL2113. |
| 6 | VB | power_in | High side floating supply, recommended VS+10V to VS+20V (absolute max 625V for XL2113), with undervoltage lockout. |
| 7 | HO | output | High side gate drive output, swings VS to VB. |
| 8 | NC | unconnected | Pin 8 is shown without a signal name in the DIP14 lead assignment (no pin is present in the lead definitions). |
| 9 | VDD | power_in | Logic supply, recommended VSS+3V to VSS+20V. |
| 10 | HIN | input | Logic input for high side gate driver output (HO), in phase; CMOS Schmitt-triggered with pull-down, referenced to VSS. |
| 11 | SD | input | Logic input for shutdown; CMOS Schmitt-triggered with pull-down, referenced to VSS. |
| 12 | LIN | input | Logic input for low side gate driver output (LO), in phase; CMOS Schmitt-triggered with pull-down, referenced to VSS. |
| 13 | VSS | power_in | Logic ground; logic offset relative to COM is ±5V. |
| 14 | NC | unconnected | Pin 14 is shown without a signal name in the DIP14 lead assignment (no pin is present in the lead definitions). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | XINLUDA |
| Package | DIP-14 |
| Category | Motor Driver ICs |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| High side floating supply voltage (XL2113) | VB | -0.3 | 625 | V | 4 | ||
| Low side fixed supply voltage | VCC | -0.3 | 25 | V | 4 | ||
| Allowable offset supply voltage transient | dVs/dt | 50 | V/ns | figure 2 | 4 | ||
| Package power dissipation (14 lead DIP) | PD | 1.6 | W | @ TA +25°C (14 lead DIP) | 4 | ||
| Thermal resistance, junction to ambient (14 lead DIP) | RTHJA | 75 | °C/W | 14 lead DIP | 4 | ||
| Junction temperature | TJ | 150 | °C | 4 | |||
| Storage temperature | TS | -55 | 150 | °C | 4 | ||
| Lead temperature (soldering) | TL | 300 | °C | soldering, 10 seconds | 4 | ||
| Low side fixed supply voltage | VCC | 10 | 20 | V | 4 | ||
| High side floating supply offset voltage (XL2113) | VS | 600 | V | Note 1 | 4 | ||
| Logic supply offset voltage | VSS | -5 | 5 | V | Note 2 | 4 | |
| Ambient temperature | TA | -40 | 85 | °C | 4 | ||
| Turn-on propagation delay | ton | 120 | 150 | ns | VS = 0V | 5 | |
| Turn-off propagation delay | toff | 94 | 125 | ns | VS = 500V/600V | 5 | |
| Shutdown propagation delay | tsd | 110 | 140 | ns | VS = 500V/600V | 5 | |
| Turn-on rise time | tr | 25 | 35 | ns | 5 | ||
| Turn-off fall time | tf | 17 | 25 | ns | 5 | ||
| Delay matching, HS & LS turn-on/off (XL2113) | MT | 20 | 5 | ||||
| Logic "1" input voltage | VIH | 9.5 | V | 5 | |||
| Logic "0" input voltage | VIL | 6 | V | 5 | |||
| High level output voltage, VBIAS - VO | VOH | 1.2 | V | IO = 0A | 5 | ||
| Low level output voltage, VO | VOL | 0.1 | V | IO = 0A | 5 | ||
| Offset supply leakage current | ILK | 50 | µA | VB=VS = 500V/600V | 5 | ||
| Quiescent VBS supply current | IQBS | 125 | 230 | µA | VIN = 0V or VDD | 5 | |
| Quiescent VCC supply current | IQCC | 180 | 340 | µA | VIN = 0V or VDD | 5 | |
| Quiescent VDD supply current | IQDD | 15 | 30 | µA | VIN = 0V or VDD | 5 | |
| Logic "1" input bias current | IIN+ | 20 | 40 | µA | VIN = VDD | 5 | |
| Logic "0" input bias current | IIN- | 1 | µA | VIN = 0V | 5 | ||
| VBS supply undervoltage positive going threshold | VBSUV+ | 7.5 | 8.6 | 9.7 | V | 5 | |
| VBS supply undervoltage negative going threshold | VBSUV- | 7 | 8.2 | 9.4 | V | 5 | |
| VCC supply undervoltage positive going threshold | VCCUV+ | 7.4 | 8.5 | 9.6 | V | 5 | |
| VCC supply undervoltage negative going threshold | VCCUV- | 7 | 8.2 | 9.4 | V | 5 | |
| Output high short circuit pulsed current | IO+ | 2 | 2.5 | A | VO=0V,VIN=VDD PW 10 µs | 5 | |
| Output low short circuit pulsed current | IO- | 2 | 2.5 | A | VO=15V, VIN=0V PW 10 µs | 5 |
CAD (KiCad official)
- Symbol:
XL2113PBF - Footprint:
Package_DIP:DIP-14_W7.62mm - 3D model: DIP-14 (KiCad packages3D, STEP)
- 3D model files:
xl2113pbf-etched.step/xl2113pbf-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);xl2113pbf.step/xl2113pbf.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: XINLUDA datasheet (18 pp, sha256
431aa1d1568fc654, retrieved 2026-10-16, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).