component
INA500AIDBVR
Public Made by Adomby adom
Texas Instruments , SOT-23-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownINA500AIDBVR
Texas Instruments · IC · SOT-23-6
INA500AIDBVR from Texas Instruments, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT | output | Output; the output voltage is developed with respect to the voltage on the REF pin. |
| 2 | V- | power_in | Negative supply; single-supply VS range is 1.7V to 5.5V (dual ±0.85V to ±2.75V). |
| 3 | IN+ | input | Positive (noninverting) input of the difference amplifier with >1MΩ input impedance. |
| 4 | IN- | input | Negative (inverting) input of the difference amplifier with >1MΩ input impedance. |
| 5 | REF | input | Reference input; the output is developed with respect to this pin, which is used to level-shift the output in single-supply operation. |
| 6 | V+ | power_in | Positive supply; supply voltage VS = (V+) - (V-) is 1.7V to 5.5V with a recommended 0.1µF bypass capacitor. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOT-23-6 |
| Category | |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Offset voltage, RTO | VOSO | -3.5 | 0.7 | 3.5 | mV | VS = 5.5V, TA = 25°C | 5 |
| Offset voltage over T, RTO | VOSO | -3.6 | 3.6 | mV | VS = 5.5V, TA = -40°C to 125°C | 5 | |
| Offset temp drift, RTO | -8.5 | 1.8 | 8.5 | µV/°C | VS = 5.5V, TA = -40°C to 125°C | 5 | |
| Power-supply rejection ratio | PSRR | 40 | 175 | µV/V | VS = 1.7V to 5.5V, TA = 25°C | 5 | |
| CMRR, high CMRR region | CMRR DC | 75 | 87 | dB | VS = 5.5V, VREF = VS / 2, VCM = [2*(V-), VREF] to [2*(V+), VREF, 1.4V] | 5 | |
| CMRR, rail-to-rail region | CMRR DC | 62 | 77 | dB | VS = 5.5V, VREF = VS / 2, VCM = [2*(V-), VREF] to [2*(V+), VREF] | 5 | |
| Gain error | GE | -0.05 | 0.01 | 0.05 | % | VREF = VS / 2, VO = (V-) + 0.1V to (V+), 0.1V | 5 |
| Positive rail headroom | VOH | 10.5 | 15 | mV | RL = 10kΩ to VS / 2 | 5 | |
| Negative rail headroom | VOL | 8.5 | 15 | mV | RL = 10kΩ to VS / 2 | 5 | |
| Reference gain error | REF-GE | -0.02 | 0.005 | 0.02 | % | VS = 5.5V | 6 |
| Quiescent current | IQ | 13.5 | 18.5 | µA | VS = 5.5V | 6 | |
| Quiescent current over temperature | IQ | 19.5 | µA | VS = 5.5V, TA = -40°C to 125°C | 6 | ||
| Supply voltage, single supply | VS | 1.7 | 5.5 | V | Single-supply | 4 | |
| Supply voltage, dual supply | VS | -0.85 | 0.85 | V | Dual-supply, printed ±0.85 to ±2.75 | 4 | |
| Specified temperature | -40 | 125 | °C | 4 | |||
| Bypass capacitor | CBYP | 0.1 | µF | Low-ESR ceramic between each supply pin and ground | 4 | ||
| Supply voltage, single supply | VS | 6 | V | VS = (V+), (V-) | 4 | ||
| Supply voltage, dual supply | VS | 3 | V | Dual supply, ±3 V | 4 | ||
| Signal input pins current | -10 | 10 | mA | 4 | |||
| Operating temperature | TA | -55 | 150 | °C | 4 | ||
| Junction temperature | TJ | 150 | °C | 4 | |||
| Storage temperature | Tstg | -65 | 150 | °C | 4 | ||
| ESD HBM | V(ESD) | -2500 | 2500 | V | Human-body model, ANSI/ESDA/JEDEC JS-001 | 4 | |
| ESD CDM | V(ESD) | -1500 | 1500 | V | Charged-device model, JEDEC JESD22-C101 | 4 | |
| Junction-to-ambient thermal resistance | RθJA | 195.9 | °C/W | DBV (SOT-23), 6 pins | 4 | ||
| Junction-to-case (top) thermal resistance | RθJC(top) | 115.5 | °C/W | DBV (SOT-23), 6 pins | 4 | ||
| Junction-to-board thermal resistance | RθJB | 77.1 | °C/W | DBV (SOT-23), 6 pins | 4 | ||
| Junction-to-top characterization parameter | ψJT | 52.2 | °C/W | DBV (SOT-23), 6 pins | 4 | ||
| Junction-to-board characterization parameter | ψJB | 76.8 | °C/W | DBV (SOT-23), 6 pins | 4 | ||
| Differential input resistance | RIN-DM | 2160 | kΩ | 5 | |||
| Common-mode input resistance | RIN-CM | 1080 | kΩ | 5 | |||
| Output voltage noise density | eNI | 310 | nV/√Hz | f = 1kHz | 5 | ||
| Output voltage noise | ENI | 8 | µVPP | fB = 0.1Hz to 10Hz | 5 | ||
| Gain drift vs temperature | 1 | ppm/°C | TA = -40°C to 125°C | 5 | |||
| Load capacitance drive | CL | 200 | pF | VO = 100mV step, Overshoot < 20% | 5 | ||
| Closed-loop output impedance | ZO | 200 | Ω | f = 10kHz | 5 | ||
| Short-circuit current | ISC | 33 | mA | VS = 5.5V | 5 | ||
| Bandwidth, -3dB | BW | 125 | kHz | VIN = 10mVpk-pk | 5 | ||
| Slew rate | SR | 0.2 | V/µs | VS = 5V, VO = 2V step | 5 | ||
| Quiescent current | IQ | 14.5 | µA | VS = 1.7V | 6 |
CAD (KiCad official)
- Symbol:
INA500AIDBVR - Footprint:
Package_TO_SOT_SMD:SOT-23-6 - 3D model: SOT-23-6 (KiCad packages3D, STEP)
- 3D model files:
ina500aidbvr-etched.step/ina500aidbvr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ina500aidbvr.step/ina500aidbvr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (51 pp, sha256
c1a221a1c38b5798, retrieved 2026-10-23, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).