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CD74HC40103M96

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Texas Instruments Counters, Dividers, SOIC-16. Pinout reviewed by a person against the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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CD74HC40103M96

Texas Instruments · Counters, Dividers · SOIC-16

CD74HC40103M96 from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VCC power_in Positive supply; 2V to 6V for HC types and 4.5V to 5.5V for HCT types.
2 TC output Terminal count output, active low: it goes low when the count reaches zero if TE is low and remains low for one full clock period.
3 P7 input Preset data input, most significant bit of the 8-bit preset word (P7 = MSB, P0 = LSB).
4 P6 input Preset data input, bit 6 of the 8-bit preset word.
5 P5 input Preset data input, bit 5 of the 8-bit preset word.
6 PL input Asynchronous preset load, active low: when low, data at P0-P7 is forced into the counter regardless of PE, TE or CP.
7 P4 input Preset data input, bit 4 of the 8-bit preset word.
8 PE input Synchronous preset enable, active low: when low, data at P0-P7 is clocked into the counter on the next positive clock transition regardless of TE.
9 P0 input Preset data input, least significant bit of the 8-bit preset word.
10 P3 input Preset data input, bit 3 of the 8-bit preset word.
11 GND power_in Ground reference for the device.
12 P2 input Preset data input, bit 2 of the 8-bit preset word.
13 P1 input Preset data input, bit 1 of the 8-bit preset word.
14 CP input Clock input; the counter decrements by one on each positive (negative-to-positive) clock transition.
15 MR input Asynchronous master reset, active low: when low, the counter is cleared to its maximum count (255) regardless of other inputs.
16 TE input Count enable: counting is inhibited when TE is high, and TE is also the cascade input for synchronous or ripple cascading.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-16
Category Logic
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
High Level Input Voltage VIH 1.5 V VCC=2 V; 25°C 3
High Level Input Voltage VIH 3.15 V VCC=4.5 V; 25°C 3
High Level Input Voltage VIH 4.2 V VCC=6 V; 25°C 3
Low Level Input Voltage VIL 0.5 V VCC=2 V; 25°C 3
Low Level Input Voltage VIL 1.35 V VCC=4.5 V; 25°C 3
Low Level Input Voltage VIL 1.8 V VCC=6 V; 25°C 3
High Level Output Voltage, CMOS Loads VOH 1.9 V VI=VIH or VIL, IO=-0.02 mA, VCC=2 V; 25°C 3
High Level Output Voltage, CMOS Loads VOH 4.4 V VI=VIH or VIL, IO=-0.02 mA, VCC=4.5 V; 25°C 3
High Level Output Voltage, CMOS Loads VOH 5.9 V VI=VIH or VIL, IO=-0.02 mA, VCC=6 V; 25°C 3
High Level Output Voltage, TTL Loads VOH 3.98 V IO=-4 mA, VCC=4.5 V; 25°C 3
High Level Output Voltage, TTL Loads VOH 3.7 V IO=-4 mA, VCC=4.5 V; -55°C to 125°C 3
High Level Output Voltage, TTL Loads VOH 5.48 V IO=-5.2 mA, VCC=6 V; 25°C 3
High Level Output Voltage, TTL Loads VOH 5.2 V IO=-5.2 mA, VCC=6 V; -55°C to 125°C 3
Low Level Output Voltage, CMOS Loads VOL 0.1 V VI=VIH or VIL, IO=0.02 mA, VCC=2 V; 25°C 3
Low Level Output Voltage, TTL Loads VOL 0.26 V IO=4 mA, VCC=4.5 V; 25°C 3
Low Level Output Voltage, TTL Loads VOL 0.4 V IO=4 mA, VCC=4.5 V; -55°C to 125°C 3
Input Leakage Current II -0.1 0.1 µA VI=VCC or GND, VCC=6 V; 25°C 3
Input Leakage Current II -1 1 µA VI=VCC or GND, VCC=6 V; -55°C to 125°C 3
Quiescent Device Current ICC 8 µA VI=VCC or GND, IO=0 mA, VCC=6 V; 25°C 3
Quiescent Device Current ICC 160 µA VI=VCC or GND, IO=0 mA, VCC=6 V; -55°C to 125°C 3
Operating temperature range TA -55 125 °C 3
Supply voltage range, HC types VCC 2 6 V HC types 3
Input rise and fall time 1000 ns VCC=2 V 3
Input rise and fall time 500 ns VCC=4.5 V 3
Input rise and fall time 400 ns VCC=6 V 3
DC supply voltage VCC -0.5 7 V 3
DC input diode current IIK -20 20 mA For VI < -0.5 V or VI > VCC + 0.5 V 3
DC output diode current IOK -20 20 mA For VO < -0.5 V or VO > VCC + 0.5 V 3
DC output source or sink current per output pin IO -25 25 mA For VO > -0.5 V or VO < VCC + 0.5 V (as printed) 3
DC VCC or ground current ICC -50 50 mA 3
Maximum junction temperature 150 °C 3
Maximum storage temperature range -65 150 °C 3
Maximum lead temperature (soldering) 300 °C Soldering 10 s; SOIC lead tips only 3
Thermal resistance, junction to ambient θJA 73 °C/W M (SOIC) package; typical, per JESD 51-7 (Note 1) 3

CAD (KiCad official)

  • Symbol: CD74HC40103M96
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16 (KiCad packages3D, STEP)
  • 3D model files: cd74hc40103m96-etched.step / cd74hc40103m96-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cd74hc40103m96.step / cd74hc40103m96.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (18 pp, sha256 57b697644269e55f, retrieved 2026-10-21, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF