component
EG6599
Public Made by Adomby adom
EG Micro AC-DC Controllers And Regulators, SOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownEG6599
EG Micro · AC-DC Controllers And Regulators · SOP-16
EG6599 from EG Micro, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CSS | output | Soft-start capacitor node that is discharged when VCC is below UVLO, LINE is below 1.25 V or above 6 V, DIS is above 1.85 V, ISEN is above 1.5 V, or DELAY is above 3.5 V. |
| 2 | DELAY | output | Overcurrent delay node: above 2 V it fully discharges the soft-start capacitor to drive maximum frequency, the IC shuts down internally above 3.5 V, and it restarts when the voltage falls below 0.3 V. |
| 3 | CF | output | Connection for the external oscillator timing capacitor. |
| 4 | RFMIN | input | Minimum oscillator frequency setting pin that provides a 2 V reference, with about 2 mA source capability, and is also used for the soft-start network. |
| 5 | STBY | input | Burst-mode input: below 1.25 V the IC enters a low-power idle state, above 1.25 V it operates normally, and it should be tied to RFMIN if burst mode is not used. |
| 6 | ISEN | input | Current sense input: above 0.8 V it discharges the soft-start capacitor and triggers frequency shift, and above 1.5 V the IC enters a low-power state that requires a VCC restart to clear the latch. |
| 7 | LINE | input | High-line voltage detection input: below 1.25 V the IC enters a low-power state, and if the function is unused it should be biased between 1.25 V and 6 V. |
| 8 | DIS | input | Latched disable input: above 1.85 V the IC enters a low-power state that requires a VCC restart to clear the latch, and it should be connected to GND if unused. |
| 9 | PFC_STOP | output | Open-collector PFC drain control output that is pulled low when DIS > 1.85 V, ISEN > 1.5 V, LINE > 6 V, STBY < 1.25 V or DELAY > 2 V, and should be left floating if unused. |
| 10 | GND | power_in | Chip ground terminal. |
| 11 | LVG | output | Low-side gate drive output with 0.3 A source and 0.8 A sink peak drive capability. |
| 12 | VCC | power_in | Chip supply input; the datasheet gives a 25 V absolute maximum and a typical operating range of 7.5 V to 20 V with 15 V typical. |
| 13 | NC | unconnected | No connection; leave floating. |
| 14 | OUT | output | High-side driver floating ground (half-bridge switching node), with an absolute range of VBOOT-25 V to VBOOT+0.3 V. |
| 15 | HVG | output | High-side gate drive output with 0.3 A source and 0.8 A sink peak drive capability. |
| 16 | VBOOT | power_in | High-side floating supply input, with an absolute maximum rating of 600 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | EG Micro |
| Package | SOP-16 |
| Category | Power Management (PMIC) |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Bootstrap high-side supply (VBOOT) | VBOOT | -0.3 | 600 | V | 8 | ||
| Low-side gate output (LVG) | LVG | -0.3 | V | 8 | |||
| Supply voltage (VCC) | VCC | -0.3 | 25 | V | 8 | ||
| PFC_STOP maximum voltage | VPFC_STOP | -0.3 | V | 8 | |||
| RFMIN maximum current | IRFMIN | 2 | mA | 8 | |||
| Ambient temperature | TA | -45 | 125 | ℃ | 8 | ||
| Storage temperature | Tstr | -55 | 150 | ℃ | 8 | ||
| Soldering temperature | TL | 300 | ℃ | T=10S | 8 | ||
| Supply voltage (VCC) | VCC | 7.5 | 15 | 20 | V | 8 | |
| VCC turn-on voltage | Vcc(on) | 9 | 10 | 11 | V | 8 | |
| VCC turn-off voltage | Vcc(off) | 6.5 | 7.5 | 8.5 | V | 8 | |
| Start-up current | Istart-up | 200 | 300 | uA | VCC=VCC-0.2V | 8 | |
| Quiescent current | IQ | 1.3 | 2 | mA | VSTBY=1V | 8 | |
| Operating current | IOP | 2 | 5 | mA | VSTBY=VRFMIN | 8 | |
| Shutdown current | IQ | 270 | 400 | uA | VDIS>1.85V or VDELAY>3.5V or VLINE<1.25V or VLINE=Vclamp | 8 | |
| High-side floating supply leakage current | ILKBOOT | 5 | uA | VBOOT=580V | 8 | ||
| VOUT leakage current | ILKOUT | 5 | uA | VOUT=562V | 8 | ||
| Current-sense input bias current | IISEN | -1 | uA | VISEN=0 | 9 | ||
| Frequency-shift turn-on voltage | VISEN | 0.76 | 0.8 | 0.84 | V | 9 | |
| Latched shutdown voltage | VISENDIS | 1.44 | 1.5 | 1.56 | V | 9 | |
| Output delay | TD(H-L) | 300 | 400 | nS | 9 | ||
| Bus detection turn-on threshold | VTH | 1.2 | 1.25 | 1.3 | V | 9 | |
| Bus detection hysteresis current | IHYST | 12 | 15 | 18 | uA | VCC>5V, VLINE=0.3V | 9 |
| Clamp voltage | Vclamp | 6 | 8 | V | ILINE=1 mA | 9 | |
| DIS input bias current | IDIS | -1 | uA | VDIS=0 | 9 | ||
| DIS shutdown threshold | VTH | 1.77 | 1.85 | 1.93 | V | 9 | |
| Duty cycle (HVG and LVG) | D | 48 | 50 | 52 | % | 9 | |
| Oscillator frequency | FOSC | 58.2 | 60 | 61.8 | KHZ | 9 | |
| Oscillator frequency | FOSC | 240 | 250 | 260 | KHZ | RRFMIN=2.7K | 9 |
| Recommended maximum oscillator frequency | 500 | KHZ | 9 | ||||
| Dead time | TD | 0.2 | 0.3 | 0.4 | Us | 9 | |
| Reference voltage (RFMIN) | VREF | 1.92 | 2 | 2.08 | V | 9 | |
| RFMIN resistance range | RFMIN | 1 | 100 | KΩ | 9 | ||
| PFC_STOP leakage current | Ileak | 1 | uA | VPFC_STOP=VCC | 9 | ||
| PFC_STOP low-level voltage | VL | 0.2 | V | IPFC_STOP=1mA, DIS=2V | 9 | ||
| Soft-start leakage current | Ileak | 0.5 | uA | VCSS=2V | 9 | ||
| Burst mode bias current | IDIS | -1 | uA | VDIS=0 | 10 | ||
| Burst mode threshold voltage | VTH | 1.2 | 1.25 | 1.3 | V | 10 | |
| Overcurrent delay leakage current | Ileak | 0.5 | uA | 10 | |||
| Overcurrent delay charge current | ICHARGE | 100 | 150 | 200 | uA | VDELAY=1V, VISEN=0.85V | 10 |
| Delay threshold 1 | VTH1 | 1.92 | 2 | 2.08 | V | 10 | |
| Delay threshold 2 | VTH2 | 3.3 | 3.5 | 3.7 | V | 10 | |
| Delay threshold 3 | VTH3 | 0.25 | 0.3 | 0.35 | V | 10 | |
| Low-side driver output low level | VLVGL | 1.5 | V | ISINK=200mA | 10 | ||
| Low-side driver output high level | VLGH | 12.8 | 13.3 | V | ISOURCE=5mA | 10 | |
| Low-side peak source current | ISORUCEPK | -0.3 | A | 10 | |||
| Low-side peak sink current | ISINKPK | 0.8 | A | 10 | |||
| High-side driver output low level | VHVGL | 1.5 | V | ISINK=200mA | 10 | ||
| High-side driver output high level | VHGH | 12.8 | 13.3 | V | ISOURCE=5mA | 10 | |
| High-side peak source current | ISORUCEPK | -0.3 | A | 10 | |||
| High-side peak sink current | ISINKPK | 0.8 | A | 10 |
CAD (KiCad official)
- Symbol:
EG6599 - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOP-16 (KiCad packages3D, STEP)
- 3D model files:
eg6599-etched.step/eg6599-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);eg6599.step/eg6599.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: EG Micro datasheet (22 pp, sha256
988183c67796ee47, retrieved 2026-10-18, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).