MCP2561FD-E from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	TXD	input	Transmit Data Input from the CAN controller; Low drives CANH/CANL Dominant, High is Recessive, with an internal pull-up (nominal 33 kΩ) to VDD in the MCP2561FD.
2	VSS	power_in	Ground supply pin.
3	VDD	power_in	Positive supply voltage pin that supplies the transmitter and receiver, including the wake-up receiver; undervoltage threshold is typically 4V.
4	RXD	output	Receive Data Output, CMOS-compatible, High when the CAN bus is Recessive and Low when Dominant, supplied by VDD in the MCP2561FD.
5	SPLIT	output	Common mode stabilization reference voltage output (VDD/2), active only in Normal mode and floating in Standby mode or when VDD is off.
6	CANL	bidirectional	CAN Low-level voltage I/O driving the low side of the differential bus, tied internally to the receive comparator and disconnected from the bus when unpowered.
7	CANH	bidirectional	CAN High-level voltage I/O driving the high side of the differential bus, tied internally to the receive comparator and disconnected from the bus when unpowered.
8	STBY	input	Standby Mode Input selecting Normal (Low) or Standby (High) mode, with an internal MOS pull-up to VDD (typically 660 kΩ at 5V, 1.1 MΩ at 3.3V, 4.4 MΩ at 1.8V).

Key specifications

Parameter	Value
Manufacturer	Microchip Tech
Package	SOIC-8
Category	Interface ICs
Pins	8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
VDD Voltage Range	VDD	4.5		5.5	V		9
Supply Current Recessive	IDD		5	10	mA	Recessive; VTXD = VDD	9
Supply Current Dominant	IDD		45	70	mA	Dominant; VTXD = 0V	9
Standby Current	IDDS		5	15	µA	MCP2561FD	9
High Level of the POR Comparator	VPORH	3.8		4.3	V		9
Low Level of the POR Comparator	VPORL	3.4		4	V		9
Hysteresis of POR Comparator	VPORD	0.3		0.8	V		9
CANH; CANL Recessive Bus Output Voltage	VO(R)	2		3	V	VTXD = VDD; No load	9
CANH; CANL Bus Output Voltage in Standby	VO(S)	-0.1	0	0.1	V	STBY = VTXD = VDD; No load	9
Recessive Output Current	IO(R)	-5		5	mA	-24V < VCAN < +24V	9
CANH Dominant Output Voltage	VO(D)	2.75	3.5	4.5	V	TXD = 0; RL = 50 to 65	9
CANL Dominant Output Voltage	VO(D)	0.5	1.5	2.25	V	RL = 50 to 65	9
Symmetry of Dominant Output Voltage	VO(D)(M)	-400	0	400	mV	VTXD = VSS (Note 1)	9
Dominant Differential Output Voltage	VO(DIFF)	1.5	2	3	V	VTXD = VSS; RL = 50 to 65	9
Recessive Differential Output Voltage	VO(DIFF)	-120	0	12	mV	VTXD = VDD	9
Recessive Differential Output Voltage, no load	VO(DIFF)	-500	0	50	mV	VTXD = VDD, no load	9
CANH Short Circuit Output Current	IO(SC)	-120	85		mA	VTXD = VSS; VCANH = 0V; CANL: floating	10
CANH Short Circuit Output Current, 25°C	IO(SC)	-100			mA	VDD=5V, TAMB = 25°C (Note 1)	10
CANL Short Circuit Output Current	IO(SC)		75	120	mA	VTXD = VSS; VCANL = 18V; CANH: floating	10
CANL Short Circuit Output Current, 25°C	IO(SC)			100	mA	VDD=5V, TAMB = 25°C (Note 1)	10
Recessive Differential Input Voltage, Normal	VDIFF(R)(I)	-1		0.5	V	Normal Mode; -12V < V(CANH, CANL) < +12V	10
Recessive Differential Input Voltage, Standby	VDIFF(R)(I)	-1		0.4	V	Standby Mode; -12V < V(CANH, CANL) < +12V	10
Dominant Differential Input Voltage, Normal	VDIFF(D)(I)	0.9			V	Normal Mode; -12V < V(CANH, CANL) < +12V (max printed as VDD)	10
Dominant Differential Input Voltage, Standby	VDIFF(D)(I)	1			V	Standby Mode; -12V < V(CANH, CANL) < +12V (max printed as VDD)	10
Differential Receiver Threshold, Normal	VTH(DIFF)	0.5	0.7	0.9	V	Normal Mode; -12V < V(CANH, CANL) < +12V	10
Differential Receiver Threshold, Standby	VTH(DIFF)	0.4		1.15	V	Standby Mode; -12V < V(CANH, CANL) < +12V	10
Differential Input Hysteresis	VHYS(DIFF)	50		200	mV	Normal mode, see Figure 2-6, (Note 1)	10
Common Mode Input Resistance	RIN	10		30	kΩ	(Note 1)	10
Common Mode Resistance Matching	RIN(M)	-1	0	1	%	VCANH = VCANL, (Note 1)	10
Differential Input Resistance	RIN(DIFF)	10		100	kΩ	(Note 1)	10
Common Mode Input Capacitance	CIN(CM)			20	pF	VTXD = VDD; (Note 1)	10
Differential Input Capacitance	CIN(DIFF)			10	pF	VTXD = VDD; (Note 1)	10
CANH, CANL Input Leakage	ILI	-5		5	µA	VDD = VTXD = VSTBY = 0V; VCANH = VCANL = 5 V	10
SPLIT Leakage Current	IL	-5		5	µA	Standby mode; VSPLIT = -24V to + 24V	11
High-Level Input Current	IIH	-1		1	µA		11
TXD Low-Level Input Current	IIL(TXD)	-270	-150	-30	µA		11
STBY Low-Level Input Current	IIL(STBY)	-30		-1	µA		11
RXD Low-Level Output Voltage	VOL			0.4	V	IOL = 4 mA; typical 8 mA	11
Shutdown Junction Temperature	TJ(SD)	165	175	185	°C	-12V < V(CANH, CANL) < +12V, (Note 1)	11
Shutdown Temperature Hysteresis	TJ(HYST)	20		30	°C	-12V < V(CANH, CANL) < +12V, (Note 1)	11
Bit Time	tBIT	0.2		69.44	µs		13
Bit Frequency	fBIT	14.4		5000	kHz		13
Propagation Delay TXD to RXD	tTXD-RXD		90	120	ns		13
Propagation Delay TXD to RXD, 120Ω/200pF	tTXD-RXD		120	180	ns	RL = 120Ω, CL = 200 pF, (Note 1)	13
Recessive bit time on RXD 2 Mbps	tBIT(RXD),2M	450	485	550	ns	tBIT(TXD) = 500 ns, see Figure 2-10	13
Recessive bit time on RXD 2 Mbps, 120Ω/200pF	tBIT(RXD),2M	400	460	550	ns	tBIT(TXD) = 500 ns, RL = 120Ω, CL = 200 pF, (Note 1)	13
Recessive bit time on RXD 5 Mbps	tBIT(RXD),5M	160	185	220	ns	tBIT(TXD) = 200 ns, see Figure 2-10	13
Recessive bit time on RXD 8 Mbps	tBIT(RXD),8M	85	105	140	ns	tBIT(TXD) = 120 ns, see Figure 2-10 (Note 1)	13
Delay Bus Dominant to RXD (Standby mode)	tFLTR(WAKE)	0.5	1	4	µs	Standby mode	13
Delay Standby to Normal Mode	tWAKE	5	25	40	µs	Negative edge on STBY	13
Supply voltage VDD	VDD			7	V		8
DC Voltage at CANH, CANL and SPLIT		-58		58	V		8
Transient Voltage on CANH, CANL		-150		100	V	ISO-7637 (See Figure 2-5)	8
Storage temperature		-55		150	°C		8
Operating ambient temperature		-40		150	°C		8
Virtual Junction Temperature	TVJ	-40		190	°C	IEC60747-1	8
Soldering temperature of leads				300	°C	10 seconds	8
ESD CANH/CANL IEC 61000-4-2 (MCP2561FD)		-14		14	kV	IEC 61000-4-2	8
ESD CANH/CANL HBM		-8		8	kV	IEC 801; Human Body Model	8
ESD other pins HBM		-4		4	kV	IEC 801; Human Body Model	8
Specified Temperature Range (Extended)	TA	-40		125	°C		16
Thermal Resistance, 8L-SOIC	θJA		149.5		°C/W		16

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part	Material	Colour / plating	Datasheet says	Page
contacts		tin	P = Plastic Dual In-Line - 300 mil Body, 8-lead SN = Plastic Small Outline - Narrow, 3.90 mm Body,	29

CAD (KiCad official)

Symbol: MCP2561FD-E
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SOIC-8 (KiCad packages3D, STEP)
3D model files: mcp2561fd-e-etched.step / mcp2561fd-e-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mcp2561fd-e.step / mcp2561fd-e.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Microchip Tech datasheet (32 pp, sha256 fb9e60247cea911f, retrieved 2026-10-31, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

MCP2561FD-E

Verified MCP2561FD-E

Verification log 1 record

3D Model

Symbol & Footprint

Schematic Symbol

PCB Footprint

Datasheet

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