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ADUM242E1BRIZ

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Analog Devices Digital Isolators, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentsignal isolation devicesadum242e1brizfactory-2.0.0extractor-text

Verified ADUM242E1BRIZ

by Ray · last 2 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

2 Nov 2026RayPublished by the parts factory: tier mfr, 16 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: ADUM242E1BRIZ · SOIC-16 · 16 pins
  • ✓copper: 16 copper pads, none touching another net
  • ✓datasheet: all 16 pin names found in the 27-page datasheet
  • ✓distributor: lcsc C7457182, digikey 505-ADUM242E1BRIZ-ND, mouser 584-ADUM242E1BRIZ
  • ✓family: SOIC-16_3.9x9.9mm_P1.27mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-1lb5hk_g/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 16 pins = 16 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 16 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ adum242e1briz.kicad_sym✓ adum242e1briz.kicad_mod✓ adum242e1briz.step
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Contents

README

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ADUM242E1BRIZ

Analog Devices · Digital Isolators · SOIC-16

ADUM242E1BRIZ from Analog Devices, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD1 power_in Supply voltage for isolator side 1; the datasheet specifies VDD1 and VDD2 from 1.7 V to 5.5 V.
2 GND1 power_in Ground reference for isolator side 1.
3 VIA input Logic input A on isolator side 1.
4 VIB input Logic input B on isolator side 1.
5 VOC output Logic output C on isolator side 2; it is set to high-Z when VE1 is low.
6 VOD output Logic output D on isolator side 2; it is set to high-Z when VE1 is low.
7 VE1 input Output enable 1, an active high logic input: when high or disconnected the VOC and VOD outputs are enabled, and when low they are disabled to the high-Z state.
8 GND1 power_in Ground reference for isolator side 1.
9 GND2 power_in Ground reference for isolator side 2.
10 VE2 input Output enable 2, an active high logic input: when high or disconnected the VOA and VOB outputs are enabled, and when low they are disabled to the high-Z state.
11 VID input Logic input D on isolator side 2.
12 VIC input Logic input C on isolator side 2.
13 VOB output Logic output B on isolator side 1.
14 VOA output Logic output A on isolator side 1.
15 GND2 power_in Ground reference for isolator side 2.
16 VDD2 power_in Supply voltage for isolator side 2; the datasheet specifies VDD1 and VDD2 from 1.7 V to 5.5 V.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package SOIC-16
Category Signal Isolation Devices
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Pulse Width PW 6.6 ns Within pulse width distortion (PWD) limit 4
Data Rate 150 Mbps Within PWD limit 4
Propagation Delay tPHL, tPLH 4.8 7.2 13 ns 50% input to 50% output 4
Pulse Width Distortion PWD 0.5 3 ns /tPLH − tPHL/ 4
Propagation Delay Skew tPSK 6.1 ns Between any two units at the same temperature, voltage, and load 4
Channel Matching Codirectional tPSKCD 0.5 3 ns 4
Channel Matching Opposing Direction tPSKOD 0.5 3 ns 4
Jitter p-p 490 ps p-p See the Jitter Measurement section 4
Jitter rms 70 ps rms See the Jitter Measurement section 4
Change vs. Temperature 1.5 ps/°C 4
Output Voltage Logic Low VOL 0 0.1 V IOx2 = 20 µA, VIx = VIxL4 4
Output Voltage Logic Low VOL 0.2 0.4 V IOx2 = 4 mA, VIx = VIxL4 4
Input Current per Channel II -10 0.01 10 µA 0 V ≤ VIx ≤ VDDx 4
VE2 Enable Input Pull-Up Current IPU -10 -3 µA VE2 = 0 V 4
DISABLE1 Input Pull-Down Current IPD 9 15 µA DISABLE1 = VDDx 4
Tristate Output Current per Channel IOZ -10 0.01 10 µA 0 V ≤ VOx ≤ VDDx 4
Quiescent Supply Current Side 1 IDD1 (Q) 1.6 2.46 mA VI5 = 0 (E0, D0), 1 (E1, D1) 4
Quiescent Supply Current Side 2 IDD2 (Q) 1.6 2.46 mA VI5 = 0 (E0, D0), 1 (E1, D1) 4
Quiescent Supply Current Side 1 IDD1 (Q) 7 11.5 mA VI5 = 1 (E0, D0), 0 (E1, D1) 4
Quiescent Supply Current Side 2 IDD2 (Q) 7 11.5 mA VI5 = 1 (E0, D0), 0 (E1, D1) 4
Positive VDDx Threshold VDDxUV+ 1.6 V 4
Negative VDDx Threshold VDDxUV− 1.5 V 4
VDDx Hysteresis VDDxUVH 0.1 V 4
Output Rise/Fall Time tR/tF 2.5 ns 10% to 90% 4
Common-Mode Transient Immunity High /CMH/ 75 100 kV/µs VIx = VDDx, VCM = 1000 V, transient magnitude = 800 V 4
Common-Mode Transient Immunity Low /CML/ 75 100 kV/µs VIx = 0 V, VCM = 1000 V, transient magnitude = 800 V 4
Propagation Delay tPHL, tPLH 4.8 6.8 14 ns 50% input to 50% output 6
Pulse Width Distortion PWD 0.7 3 ns /tPLH − tPHL/ 6
Quiescent Supply Current Side 1 IDD1 (Q) 1.6 2.4 mA VI5 = 0 (E0, D0), 1 (E1, D1) 6
Quiescent Supply Current Side 2 IDD2 (Q) 1.6 2.4 mA VI5 = 0 (E0, D0), 1 (E1, D1) 6
Quiescent Supply Current Side 1 IDD1 (Q) 7 11.2 mA VI5 = 1 (E0, D0), 0 (E1, D1) 6
Quiescent Supply Current Side 2 IDD2 (Q) 7 11.2 mA VI5 = 1 (E0, D0), 0 (E1, D1) 6
Propagation Delay tPHL, tPLH 5 7 14 ns 50% input to 50% output 8
Pulse Width Distortion PWD 0.7 3 ns /tPLH − tPHL/ 8
Quiescent Supply Current Side 1 IDD1 (Q) 1.6 2.32 mA VI5 = 0 (E0, D0), 1 (E1, D1) 8
Quiescent Supply Current Side 2 IDD2 (Q) 1.6 2.32 mA VI5 = 0 (E0, D0), 1 (E1, D1) 8
Quiescent Supply Current Side 1 IDD1 (Q) 7 11.2 mA VI5 = 1 (E0, D0), 0 (E1, D1) 8
Quiescent Supply Current Side 2 IDD2 (Q) 7 11.2 mA VI5 = 1 (E0, D0), 0 (E1, D1) 8
Propagation Delay tPHL, tPLH 5.8 8.7 15 ns 50% input to 50% output 10
Pulse Width Distortion PWD 0.7 3 ns /tPLH − tPHL/ 10
Quiescent Supply Current Side 1 IDD1 (Q) 1.6 2.28 mA VI5 = 0 (E0, D0), 1 (E1, D1) 10
Quiescent Supply Current Side 2 IDD2 (Q) 1.6 2.28 mA VI5 = 0 (E0, D0), 1 (E1, D1) 10
Quiescent Supply Current Side 1 IDD1 (Q) 7 11.2 mA VI5 = 1 (E0, D0), 0 (E1, D1) 10
Quiescent Supply Current Side 2 IDD2 (Q) 7 11.2 mA VI5 = 1 (E0, D0), 0 (E1, D1) 10
Operating Temperature TA -40 125 °C 14
Supply Voltages VDD1, VDD2 1.7 5.5 V 14
Storage Temperature Range TST -65 150 °C 15
Ambient Operating Temperature Range TA -40 125 °C 15
Supply Voltages VDD1, VDD2 -0.5 7 V 15
Side 1 Output Current per Pin IO1 -10 10 mA 15
Side 2 Output Current per Pin IO2 -10 10 mA 15
Common-Mode Transients -150 150 kV/µs 15
IC Junction to Ambient Thermal Resistance θJA 45 °C/W Thermocouple located at center of package underside 12

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
housing pC In accordance with DIN EN IEC 60747-17 (VDE 0884-17), each product is proof tested by applying an insulation test voltage ≥ 1592 V peak for 1 sec (partial discharge detection limit = 5 pC). The asteri 13

CAD (KiCad official)

  • Symbol: ADUM242E1BRIZ
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16 (KiCad packages3D, STEP)
  • 3D model files: adum242e1briz-etched.step / adum242e1briz-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); adum242e1briz.step / adum242e1briz.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (27 pp, sha256 b61e33783979b3b1, retrieved 2026-11-02, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF