component
74LVC4066BQ-Q100X
Public Made by Adomby adom
Nexperia Analog Switches, Multiplexers, DHVQFN-14(2.5x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdown74LVC4066BQ-Q100X
Nexperia · Analog Switches, Multiplexers · DHVQFN-14(2.5x3)
74LVC4066BQ-Q100X from Nexperia, in a DHVQFN-14(2.5x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1Y | bidirectional | Independent input/output of switch 1, which passes signal to or from 1Z when 1E is HIGH; switch voltage is limited to 0 V to VCC. |
| 2 | 1Z | bidirectional | Independent output/input of switch 1, which passes signal to or from 1Y when 1E is HIGH; switch voltage is limited to 0 V to VCC. |
| 3 | 2Z | bidirectional | Independent output/input of switch 2, which passes signal to or from 2Y when 2E is HIGH; switch voltage is limited to 0 V to VCC. |
| 4 | 2Y | bidirectional | Independent input/output of switch 2, which passes signal to or from 2Z when 2E is HIGH; switch voltage is limited to 0 V to VCC. |
| 5 | 2E | input | Active-HIGH enable input for switch 2; the switch is OFF when LOW, and the input accepts voltages up to 5 V with Schmitt-trigger action. |
| 6 | 3E | input | Active-HIGH enable input for switch 3; the switch is OFF when LOW, and the input accepts voltages up to 5 V with Schmitt-trigger action. |
| 7 | GND | power_in | Ground (0 V) reference for the device; the datasheet notes this is a ground pin, while the separate exposed-pad note applies to the package thermal pad. |
| 8 | 3Y | bidirectional | Independent input/output of switch 3, which passes signal to or from 3Z when 3E is HIGH; switch voltage is limited to 0 V to VCC. |
| 9 | 3Z | bidirectional | Independent output/input of switch 3, which passes signal to or from 3Y when 3E is HIGH; switch voltage is limited to 0 V to VCC. |
| 10 | 4Z | bidirectional | Independent output/input of switch 4, which passes signal to or from 4Y when 4E is HIGH; switch voltage is limited to 0 V to VCC. |
| 11 | 4Y | bidirectional | Independent input/output of switch 4, which passes signal to or from 4Z when 4E is HIGH; switch voltage is limited to 0 V to VCC. |
| 12 | 4E | input | Active-HIGH enable input for switch 4; the switch is OFF when LOW, and the input accepts voltages up to 5 V with Schmitt-trigger action. |
| 13 | 1E | input | Active-HIGH enable input for switch 1; the switch is OFF when LOW, and the input accepts voltages up to 5 V with Schmitt-trigger action. |
| 14 | VCC | power_in | Supply voltage, specified from 1.65 V to 5.5 V in the recommended operating conditions. |
| 15 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | DHVQFN-14(2.5x3) |
| Category | Interface |
| Pins | 15 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VCC supply voltage | VCC | 1.65 | 5.5 | V | 4 | ||
| VI input voltage | VI | 0 | 5.5 | V | 4 | ||
| VSW switch voltage | VSW | 0 | V | 4 | |||
| Ambient temperature | Tamb | -40 | 125 | °C | 4 | ||
| Input transition rise and fall rate | Δt/ΔV | 20 | ns/V | VCC = 1.65 V to 2.7 V; applies to control signal levels | 4 | ||
| Input transition rise and fall rate | Δt/ΔV | 10 | ns/V | VCC = 2.7 V to 5.5 V; applies to control signal levels | 4 | ||
| VCC supply voltage | VCC | -0.5 | 6.5 | V | 4 | ||
| VI input voltage | VI | -0.5 | 6.5 | V | 4 | ||
| IIK input clamping current | IIK | -50 | mA | VI < -0.5 V or VI < VCC + 0.5 V | 4 | ||
| ISK switch clamping current | ISK | -50 | 50 | mA | VI < -0.5 V or VI < VCC + 0.5 V | 4 | |
| VSW switch voltage | VSW | -0.5 | 6.5 | V | enable and disable mode | 4 | |
| ISW switch current | ISW | -50 | 50 | mA | -0.5 < VSW < VCC + 0.5 V | 4 | |
| ICC supply current | ICC | 100 | mA | 4 | |||
| IGND ground current | IGND | -100 | mA | 4 | |||
| Storage temperature | Tstg | -65 | 150 | °C | 4 | ||
| Total power dissipation | Ptot | 500 | mW | Tamb = -40 °C to +125 °C | 4 | ||
| HIGH-level input voltage | VIH | 1.7 | V | VCC = 2.3 V to 2.7 V | 5 | ||
| HIGH-level input voltage | VIH | 2 | V | VCC = 2.7 V to 3.6 V | 5 | ||
| LOW-level input voltage | VIL | 0.7 | V | VCC = 2.3 V to 2.7 V | 5 | ||
| LOW-level input voltage | VIL | 0.8 | V | VCC = 2.7 V to 3.6 V | 5 | ||
| input leakage current | II | -20 | 0.1 | 20 | μA | pin nE; VCC = 5.5 V; VI = 5.5 V or GND | 5 |
| OFF-state leakage current | IS(OFF) | -20 | 0.1 | 20 | μA | /VSW/ = VCC - GND; VCC = 5.5 V; see Fig. 6 | 5 |
| ON-state leakage current | IS(ON) | -20 | 0.1 | 20 | μA | /VSW/ = VCC - GND; VCC = 5.5 V; see Fig. 7 | 5 |
| supply current | ICC | 0.1 | 40 | μA | VI = VCC or GND; VSW = GND or VCC; VCC = 5.5 V | 5 | |
| additional supply current | ΔICC | 5 | 5000 | μA | pin nE; VI = VCC - 0.6 V; VCC = 5.5 V; VSW = GND or VCC | 5 | |
| ON resistance (peak) | RON(peak) | 34 | 195 | Ω | VI = GND to VCC; see Fig. 8; ISW = 4 mA; VCC = 1.65 V to 1.95 V | 6 | |
| ON resistance (peak) | RON(peak) | 12 | 45 | Ω | VI = GND to VCC; see Fig. 8; ISW = 8 mA; VCC = 2.3 V to 2.7 V | 6 | |
| ON resistance (peak) | RON(peak) | 10.4 | 38 | Ω | VI = GND to VCC; see Fig. 8; ISW = 12 mA; VCC = 2.7 V | 6 | |
| ON resistance (peak) | RON(peak) | 7.8 | 30 | Ω | VI = GND to VCC; see Fig. 8; ISW = 24 mA; VCC = 3 V to 3.6 V | 6 | |
| ON resistance (peak) | RON(peak) | 6.2 | 23 | Ω | VI = GND to VCC; see Fig. 8; ISW = 32 mA; VCC = 4.5 V to 5.5 V | 6 | |
| ON resistance (rail) | RON(rail) | 8.2 | 27 | Ω | VI = GND; see Fig. 8; ISW = 4 mA; VCC = 1.65 V to 1.95 V | 6 | |
| ON resistance (rail) | RON(rail) | 7.1 | 24 | Ω | VI = GND; see Fig. 8; ISW = 8 mA; VCC = 2.3 V to 2.7 V | 6 | |
| ON resistance (rail) | RON(rail) | 6.9 | 21 | Ω | VI = GND; see Fig. 8; ISW = 12 mA; VCC = 2.7 V | 6 | |
| ON resistance (rail) | RON(rail) | 6.5 | 18 | Ω | VI = GND; see Fig. 8; ISW = 24 mA; VCC = 3 V to 3.6 V | 6 | |
| ON resistance (rail) | RON(rail) | 5.8 | 15 | Ω | VI = GND; see Fig. 8; ISW = 32 mA; VCC = 4.5 V to 5.5 V | 6 | |
| ON resistance (rail) | RON(rail) | 10.4 | 45 | Ω | VI = VCC; see Fig. 8; ISW = 4 mA; VCC = 1.65 V to 1.95 V | 6 | |
| ON resistance (rail) | RON(rail) | 7.6 | 30 | Ω | VI = VCC; see Fig. 8; ISW = 8 mA; VCC = 2.3 V to 2.7 V | 6 | |
| ON resistance (rail) | RON(rail) | 7 | 27 | Ω | VI = VCC; see Fig. 8; ISW = 12 mA; VCC = 2.7 V | 6 | |
| ON resistance (rail) | RON(rail) | 6.1 | 23 | Ω | VI = VCC; see Fig. 8; ISW = 24 mA; VCC = 3 V to 3.6 V | 6 | |
| ON resistance (rail) | RON(rail) | 4.9 | 15 | Ω | VI = VCC; see Fig. 8; ISW = 32 mA; VCC = 4.5 V to 5.5 V | 6 | |
| propagation delay | tpd | 0.8 | 3 | ns | nY to nZ or nZ to nY; see Fig. 15; VCC = 1.65 V to 1.95 V | 9 | |
| propagation delay | tpd | 0.4 | 2 | ns | nY to nZ or nZ to nY; see Fig. 15; VCC = 2.3 V to 2.7 V | 9 | |
| propagation delay | tpd | 0.4 | 1.5 | ns | nY to nZ or nZ to nY; see Fig. 15; VCC = 2.7 V | 9 | |
| propagation delay | tpd | 0.3 | 1.5 | ns | nY to nZ or nZ to nY; see Fig. 15; VCC = 3.0 V to 3.6 V | 9 | |
| propagation delay | tpd | 0.2 | 1 | ns | nY to nZ or nZ to nY; see Fig. 15; VCC = 4.5 V to 5.5 V | 9 | |
| enable time | ten | 1 | 5.3 | 12.5 | ns | nE to nY or nZ; see Fig. 16; VCC = 1.65 V to 1.95 V | 9 |
| enable time | ten | 1 | 3 | 7 | ns | nE to nY or nZ; see Fig. 16; VCC = 2.3 V to 2.7 V | 9 |
| enable time | ten | 1 | 2.6 | 6.5 | ns | nE to nY or nZ; see Fig. 16; VCC = 2.7 V | 9 |
| enable time | ten | 1 | 2.5 | 5.5 | ns | nE to nY or nZ; see Fig. 16; VCC = 3.0 V to 3.6 V | 9 |
| enable time | ten | 1 | 1.9 | 5 | ns | nE to nY or nZ; see Fig. 16; VCC = 4.5 V to 5.5 V | 9 |
| disable time | tdis | 1 | 4.2 | 11.5 | ns | nE to nY or nZ; see Fig. 16; VCC = 1.65 V to 1.95 V | 9 |
| disable time | tdis | 1 | 2.4 | 7 | ns | nE to nY or nZ; see Fig. 16; VCC = 2.3 V to 2.7 V | 9 |
| disable time | tdis | 1 | 3.6 | 8.5 | ns | nE to nY or nZ; see Fig. 16; VCC = 2.7 V | 9 |
| disable time | tdis | 1 | 3.4 | 7.5 | ns | nE to nY or nZ; see Fig. 16; VCC = 3.0 V to 3.6 V | 9 |
| disable time | tdis | 1 | 2.5 | 6.5 | ns | nE to nY or nZ; see Fig. 16; VCC = 4.5 V to 5.5 V | 9 |
CAD (KiCad official)
- Symbol:
74LVC4066BQ-Q100X - Footprint:
Package_DFN_QFN:DHVQFN-14-1EP_2.5x3mm_P0.5mm_EP1x1.5mm - 3D model: DHVQFN-14(2.5x3), generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.9 mm nominal VQFN height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files:
74lvc4066bq-q100x-etched.step/74lvc4066bq-q100x-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);74lvc4066bq-q100x.step/74lvc4066bq-q100x.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Nexperia datasheet (20 pp, sha256
246d669bf5145318, retrieved 2026-10-17, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).