component
LMH0341SQE
Public Made by Adomby adom
Texas Instruments Interface - Specialized, WQFN-48-EP(7x7). Pinout reviewed by a person against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownLMH0341SQE
Texas Instruments · Interface - Specialized · WQFN-48-EP(7x7)
LMH0341SQE from Texas Instruments, in a WQFN-48-EP(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD3V3 | power_in | 3.3V Power Supply connection |
| 2 | Loopthru_EN | input | Loopthrough enable Input, H=Reclocked Loopthrough active, L=Reclocked Loopthrough disabled |
| 3 | GPIO_0 | bidirectional | General Purpose Input/Output pin 0, software configurable I/O pin |
| 4 | GPIO_1 | bidirectional | General Purpose Input/Output pin 1, software configurable I/O pin |
| 5 | RSVD_H | input | Configuration Input, must tie High via 5 kΩ resistor to VDD3V3 |
| 6 | VDD2V5 | power_in | 2.5V Power Supply connection |
| 7 | GND | power_in | Ground connection |
| 8 | GND | power_in | Ground connection |
| 9 | GND | power_in | Ground connection |
| 10 | GPIO_2 | bidirectional | General Purpose Input/Output pin 2, software configurable I/O pin |
| 11 | RX_MUX_SEL | input | Input multiplexer select, H=RXIN1 selected, L=RXIN0 selected |
| 12 | DNC | unconnected | Do Not Connect, leave open |
| 13 | RSET | input | Serial Loopthrough Output Amplitude Control, resistor connected from this pin to ground to set the signal amplitude, nominally 7.87kΩ for 800mV output (SMPTE) |
| 14 | VDD3V3 | power_in | 3.3V Power Supply connection |
| 15 | RXIN0+ | input | Serial differential input Pin, Channel 0, positive input |
| 16 | RXIN0- | input | Serial differential input Pin, Channel 0, negative input |
| 17 | VDD3V3 | power_in | 3.3V Power Supply connection |
| 18 | RXIN1- | input | Serial differential input Pin, Channel 1, negative input |
| 19 | RXIN1+ | input | Serial differential input Pin, Channel 1, positive input |
| 20 | TXOUT+ | output | Serial Digital Interface Output Pin, Non-Inverting Output |
| 21 | TXOUT- | output | Serial Digital Interface Output Pin, Inverting Output |
| 22 | GND | power_in | Ground connection |
| 23 | GND | power_in | Ground connection |
| 24 | VDD2V5 | power_in | 2.5V Power Supply connection |
| 25 | LF_REF | input | Loop Filter Reference |
| 26 | LF_CP | input | Loop Filter Connection |
| 27 | VDDPLL | power_in | 3.3V PLL Power Supply connection |
| 28 | GND | power_in | Ground connection |
| 29 | RESET | input | Reset Input Pin, H=normal mode, L=device in RESET |
| 30 | LOCK | output | PLL LOCK Status Output, H=unlock condition, L=PLL is Locked |
| 31 | SDA | bidirectional | SMBus Data I/O Pin |
| 32 | SCK | input | SMBus Clock Input Pin |
| 33 | SMB_CS | input | SMBus Chip Select Input Pin, device is selected when High |
| 34 | VDD2V5 | power_in | 2.5V Power Supply connection |
| 35 | VDD3V3 | power_in | 3.3V Power Supply connection |
| 36 | RX4- | output | LVDS Data Output Pin RX4 negative, five channel wide DDR interface |
| 37 | RX4+ | output | LVDS Data Output Pin RX4 positive, five channel wide DDR interface |
| 38 | RX3- | output | LVDS Data Output Pin RX3 negative, five channel wide DDR interface |
| 39 | RX3+ | output | LVDS Data Output Pin RX3 positive, five channel wide DDR interface |
| 40 | RX2- | output | LVDS Data Output Pin RX2 negative, five channel wide DDR interface |
| 41 | RX2+ | output | LVDS Data Output Pin RX2 positive, five channel wide DDR interface |
| 42 | RX1- | output | LVDS Data Output Pin RX1 negative, five channel wide DDR interface |
| 43 | RX1+ | output | LVDS Data Output Pin RX1 positive, five channel wide DDR interface |
| 44 | RX0- | output | LVDS Data Output Pin RX0 negative, five channel wide DDR interface |
| 45 | RX0+ | output | LVDS Data Output Pin RX0 positive, five channel wide DDR interface |
| 46 | RXCLK- | output | LVDS Clock Output Pin negative, DDR Interface |
| 47 | RXCLK+ | output | LVDS Clock Output Pin positive, DDR Interface |
| 48 | DVB_ASI | input | DVB_ASI Select Input, H=DVB_ASI Mode enabled, L=Normal Mode enabled |
| DAP | GND | power_in | Die Attach Pad, ground connection, primary GND connection for the device and must be connected to Ground along with the GND pins |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | WQFN-48-EP(7x7) |
| Category | Communication Interface Chip/UART/485/232 |
| Pins | 49 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage (VDD3V3) | VDD3V3 | -0.3 | 4 | V | 6 | ||
| Supply Voltage (VDD2V5) | VDD2V5 | -0.3 | 3 | V | 6 | ||
| LVCMOS input voltage | -0.3 | V | Upper limit printed as (VDD3V3+0.3V) | 6 | |||
| LVCMOS output voltage | -0.3 | V | Upper limit printed as (VDD3V3+0.3V) | 6 | |||
| SMBus I/O Voltage | -0.3 | 3.6 | V | 6 | |||
| LVDS Input Voltage | 0.3 | 3.6 | V | Printed as 0.3V to 3.6V | 6 | ||
| Junction Temperature | 150 | °C | 6 | ||||
| Storage Temperature | -65 | 150 | °C | 6 | |||
| Lead Temperature, Soldering | 260 | °C | 4 seconds | 6 | |||
| ESD Rating, Human Body Model | -8 | 8 | kV | 1.5 KΩ, 100 pF; printed as ≥±8KV | 6 | ||
| Supply Voltage (VDD3V3-GND) | VDD3V3 | 3.135 | 3.3 | 3.465 | V | 6 | |
| Supply Voltage (VDD2V5-GND) | VDD2V5 | 2.375 | 2.5 | 2.625 | V | 6 | |
| Supply noise amplitude | 100 | mVP-P | 10 Hz to 50 MHz | 6 | |||
| Ambient Temperature | -40 | 25 | 85 | °C | 6 | ||
| Case Temperature | 102 | °C | 6 | ||||
| Input Data Rate (LMH0341) | 270 | 2970 | Mbps | LMH0341 row | 6 | ||
| LVDS PCB board trace length | 25 | cm | mismatch <2% | 6 | |||
| Loopthrough Output Driver Pullup Resistor Termination Voltage | 2.5 | 2.625 | V | Maximum termination voltage should be identical to the device supply voltage (footnote 1) | 6 | ||
| 2.5V supply current, 2.97 Gbps, LT off | IDD2.5 | 67 | 77 | mA | 2.97 Gbps, LT off | 7 | |
| 2.5V supply current, 1.485 Gbps, LT off | IDD2.5 | 52 | 59 | mA | 1.485 Gbps, LT off | 7 | |
| 2.5V supply current, 270 Mbps, LT off | IDD2.5 | 40 | 46 | mA | 270 Mbps, LT off | 7 | |
| 2.5V supply current, 2.97 Gbps, LT on | IDD2.5 | 99 | 108 | mA | 2.97 Gbps, LT on | 7 | |
| 2.5V supply current, 1.486 Gbps, LT on | IDD2.5 | 84 | 92 | mA | 1.486 Gbps, LT on | 7 | |
| 2.5V supply current, 270 Mbps, LT on | IDD2.5 | 65 | 71 | mA | 270 Mbps, LT on | 7 | |
| 3.3V supply current, LT off | IDD3.3 | 106 | 120 | mA | LT off | 7 | |
| 3.3V supply current, LT on | IDD3.3 | 112 | 127 | mA | LT on | 7 | |
| Power Consumption | PD | 617 | 710 | mW | 2.97 Gbps, loopthrough enabled | 7 | |
| Power Consumption | PD | 580 | 670 | mW | 1.485 Gbps, loopthrough enabled | 7 | |
| Power Consumption | PD | 532 | 620 | mW | 270 Mbps, Loopthrough enabled | 7 | |
| Power Consumption | PD | 517 | 610 | mW | 2.97 Gbps, Loopthrough Disabled | 7 | |
| Power Consumption | PD | 480 | 560 | mW | 1.485 Gbps, Loopthrough Disabled | 7 | |
| Power Consumption | PD | 450 | 530 | mW | 270 Mbps, Loopthrough Disabled | 7 | |
| High Level Input Voltage | VIH | 2 | V | Upper limit printed as VDD3V3+0.3 | 7 | ||
| Low Level Input Voltage | VIL | -0.3 | 0.8 | V | 7 | ||
| High Level Output Voltage | VOH | 2.7 | 3.25 | V | IOH = −0.4 mA | 7 | |
| Low Level Output Voltage | VOL | 0.1 | 0.3 | V | IOL = 2 mA | 7 | |
| Input Current | IIN | -40 | 40 | µA | VIN = 0.4V, 2.5V or VDD; pullup and pulldown resistors not enabled | 7 | |
| Input Differential Voltage | VID | 230 | 2200 | mV | DC Coupled, VCM = 0.05V to VDD-0.05V | 8 | |
| Input Current | IIN | -350 | 50 | µA | 0V < VIN < 2.4V | 8 | |
| Input Termination | RIT | 84 | 100 | 116 | Ω | 8 | |
| Input Jitter Tolerance | TOLJIT | 6 | UI | Frequency < f2 (From SMPTE RP 184) | 8 | ||
| Input Jitter Tolerance | TOLJIT | 0.6 | UI | Frequency < f3 | 8 | ||
| Input Return Loss | RL | 25 | dB | Measured on 'ALP' evaluation board, 1.5 GHz | 8 | ||
| Input Return Loss | RL | 12 | dB | Measured on 'ALP' evaluation board, 3 GHz | 8 | ||
| Jitter Peaking | δ | 0.05 | dB | See Figure 9 | 8 | ||
| Differential Output Voltage | VOD | 230 | 310 | mV | RL = 100Ω | 8 | |
| Offset Voltage | VOS | 1.125 | 1.25 | 1.375 | V | 8 | |
| Output Short Circuit Current | IOS | -50 | mA | VOUT = 0V, RL = 100Ω | 8 | ||
| LVDS Low to High Transition time | tROTR | 300 | ps | See Figure 3 | 9 | ||
| LVDS High to Low Transition time | tROTF | 300 | ps | See Figure 3 | 9 | ||
| RxCLKOUT Duty Cycle | tRODC | 45 | 50 | 55 | % | 9 | |
| Data, Clock Input Low Voltage | VSIL | 0.8 | V | 10 | |||
| Data, Clock Input High Voltage | VSIH | 2.1 | V | Printed as 2.1 VSDD | 10 | ||
| SDI Output Datarate | 270 | 2970 | MHz | 11 | |||
| SDI Output Voltage (Loopthrough Into 75Ω Load) | VOD | 720 | 800 | 880 | mV | Loopthrough into 75Ω load | 11 |
| Output Return Loss | RL | 15 | dB | Measured 5 MHz to 1483 MHz | 11 | ||
| Bus Operating Frequency | fSMB | 10 | 100 | kHz | 10 | ||
| Time in which a device must be operational after power on | tPOR | 500 | ms | 10 | |||
| Input Termination (SMBus), RSTERM | RSTERM | 1000 | Ω | SMBus termination resistor value (single printed value, no min/max) | 6 | ||
| Thermal Resistance, Junction to Ambient | θJA | 26 | °C/W | Junction to ambient | 6 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | Abs | ESD Rating, Human Body Model, 1.5 KΩ, 100 pF ≥±8KV (1) “Absolute Maximum Ratings” are the ratings beyond which the safety of the device cannot be ensured. It is not implied that the device | 6 |
CAD (KiCad official)
- Symbol:
LMH0341SQE - Footprint:
Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm - 3D model: WQFN-48-EP(7x7) (KiCad packages3D, STEP)
- 3D model files:
lmh0341sqe-etched.step/lmh0341sqe-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lmh0341sqe.step/lmh0341sqe.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (35 pp, sha256
e95da2b015ff92f7, retrieved 2026-10-21, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).