component
MAX531BCSD+
Public Unreviewedby Ray
Analog Devices Inc Maxim Integrated Digital To Analog Converters (DAC), SOIC-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownMAX531BCSD+
Analog Devices Inc Maxim Integrated · Digital To Analog Converters (DAC) · SOIC-14
MAX531BCSD+ from Analog Devices Inc Maxim Integrated, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | BIPOFF | passive | Bipolar offset/gain resistor tap. Connects to the internal resistor network so an external reference and jumper option configures the output buffer for unipolar or bipolar operation and gain of +1 or +2. Voltage range (VSS - 0.3V) to (VDD + 0.3V). |
| 2 | DIN | input | Serial data input. 16-bit words are clocked in MSB-first on the rising edge of SCLK while CS is low. TTL/CMOS compatible; setup time tDS = 45ns. |
| 3 | CLR | input | Active-low asynchronous clear. When held low, sets the DAC register to 000 hex independently of CS. Minimum CLR pulse width tCLR = 25ns. |
| 4 | SCLK | input | Serial clock input. Data on DIN is latched on the rising edge; DOUT changes on the falling edge when CS is low. Max clock rate ≈14MHz (tCH + tCL ≥ 70ns). |
| 5 | CS | input | Active-low chip select. While low, serial data is clocked into the shift register; on the rising edge the 12 LSBs are transferred to the DAC register and update the output. Setup time tCSS = 20ns. |
| 6 | DOUT | output | Serial data output for daisy-chaining. Reproduces DIN delayed by 16 SCLK cycles plus one clock width; CMOS output with no pull-up required. Does not tri-state when CS is high; holds the last bit state. |
| 7 | DGND | power_in | Digital ground return for the serial interface and control logic. Must be within ±0.3V of AGND. |
| 8 | AGND | power_in | Analog ground return for the DAC, reference, and output buffer. Reference and output voltages are referred to this pin; connect to DGND at a single point. |
| 9 | REFIN | input | Reference input to the R-2R ladder. Accepts (VSS + 2V) to (VDD - 2V); typically driven from REFOUT (2.048V) or an external low-impedance reference. Input resistance ≥40kΩ (code-dependent, min at 555h), input capacitance up to 50pF. |
| 10 | REFOUT | output | Internal 2.048V reference output. Sources up to ~5mA and sinks ~100µA; requires a bypass capacitor to AGND (3.3µF minimum, 33µF recommended for low noise). Typical tempco 30ppm/°C. |
| 11 | VSS | power_in | Negative analog supply. 0V for single-supply operation or −5V for dual-supply bipolar output. Absolute limits −6V to +0.3V relative to DGND/AGND. |
| 12 | VOUT | output | Buffered DAC voltage output. Rail-to-rail, short-circuit protected (ISC ≈ 12mA), drives 2kΩ / 100pF loads. Slew rate 0.15V/µs typ, 25µs settling to 12 bits. |
| 13 | VDD | power_in | Positive supply, +5V ±10%. Absolute maximum +6V referenced to DGND/AGND. Bypass with 0.1µF to AGND. |
| 14 | RFB | passive | Feedback resistor of the internal output amplifier. Together with BIPOFF selects buffer gain (+1 or +2) and unipolar/bipolar configuration. Range (VSS - 0.3V) to (VDD + 0.3V). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices Inc Maxim Integrated |
| Package | SOIC-14 |
| Category | Data Acquisition |
| Pins | 14 |
Ordering variants
Same part, different packaging or reel option.
MAX531BCSD+ACSDMAX531BCSD+MAX531BCSD+ACPDMAX531BCSD+BCPD
CAD (KiCad official)
- Symbol:
MAX531BCSD+ - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices Inc Maxim Integrated datasheet (None pp, sha256
2116b0a223b64337, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).