STC15W408AS-35I-TSSOP20
Public Unreviewedby Ray
STC Micro Microcontrollers (MCU/MPU/SOC), TSSOP-20. Datasheet-verified pinout, KiCad symbol/footprint/3D.
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markdownSTC15W408AS-35I-TSSOP20
STC Micro · Microcontrollers (MCU/MPU/SOC) · TSSOP-20
STC15W408AS-35I-TSSOP20 from STC Micro, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | P1.2/ADC2/SS/ECI/CMPO | bidirectional | Standard I/O PORT1[2]. Muxed with ADC input channel 2, SPI slave-select (SS), CCP/PCA external clock input (ECI), and analog comparator output (CMPO). |
| 2 | P1.3/ADC3/MOSI | bidirectional | Standard I/O PORT1[3]. Muxed with ADC input channel 3 and SPI master-out/slave-in (MOSI). |
| 3 | P1.4/ADC4/MISO | bidirectional | Standard I/O PORT1[4]. Muxed with ADC input channel 4 and SPI master-in/slave-out (MISO). |
| 4 | P1.5/ADC5/SCLK | bidirectional | Standard I/O PORT1[5]. Muxed with ADC input channel 5 and SPI clock (SCLK). |
| 5 | P1.6/ADC6/RxD_3/XTAL2/SysClkO_2 | bidirectional | Standard I/O PORT1[6]. Muxed with ADC input channel 6, alternate UART receive (RxD_3), external-crystal output XTAL2, and secondary system-clock output (SysClkO_2 = SysClk/1, /2, or /4). |
| 6 | P1.7/ADC7/TxD_3/XTAL1 | bidirectional | Standard I/O PORT1[7]. Muxed with ADC input channel 7, alternate UART transmit (TxD_3), and external-crystal input XTAL1 (also external-clock input when a clock source is fed directly). |
| 7 | P5.4/RST/SysClkO/CMP- | bidirectional | Standard I/O PORT5[4]. Muxed with the active-high external reset input (RST), system-clock output (SysClkO = SysClk/1, /2, or /4), and comparator negative input (CMP-, set to high-impedance input when used). |
| 8 | VCC | power_in | Positive supply rail, 2.4 V to 5.5 V. |
| 9 | P5.5/CMP+ | bidirectional | Standard I/O PORT5[5]. Muxed with comparator positive input (CMP+, set to high-impedance input when used). |
| 10 | GND | power_in | Ground / negative supply rail. |
| 11 | P3.0/RxD/INT4/T2CLKO | bidirectional | Standard I/O PORT3[0]. Muxed with UART receive (RxD), external interrupt 4 (INT4, falling-edge only, power-down wake-up capable), and Timer 2 clock output (T2CLKO via INT_CLKO[2]/T2CLKO). |
| 12 | P3.1/TxD/T2 | bidirectional | Standard I/O PORT3[1]. Muxed with UART transmit (TxD) and Timer/Counter 2 external input (T2). |
| 13 | P3.2/INT0 | bidirectional | Standard I/O PORT3[2]. Muxed with external interrupt 0 (INT0). Rising- and falling-edge trigger both supported when IT0=0, falling-edge only when IT0=1. Power-down wake-up capable. |
| 14 | P3.3/INT1 | bidirectional | Standard I/O PORT3[3]. Muxed with external interrupt 1 (INT1). Rising- and falling-edge trigger both supported when IT1=0, falling-edge only when IT1=1. Power-down wake-up capable. |
| 15 | P3.4/T0/ECI_2 | bidirectional | Standard I/O PORT3[4]. Muxed with Timer/Counter 0 external input (T0) and CCP/PCA external pulse input alternate (ECI_2). |
| 16 | P3.5/T0CLKO/CCP0_2 | bidirectional | Standard I/O PORT3[5]. Muxed with Timer 0 clock output (T0CLKO, enabled via INT_CLKO[0]) and CCP0 alternate mapping (CCP0_2, capture/PWM channel 0). |
| 17 | P3.6/INT2/RxD_2/CCP1_2 | bidirectional | Standard I/O PORT3[6]. Muxed with external interrupt 2 (INT2, falling-edge only, power-down wake-up capable), alternate UART receive (RxD_2), and CCP1 alternate mapping (CCP1_2). |
| 18 | P3.7/INT3/TxD_2/CCP2/CCP2_2 | bidirectional | Standard I/O PORT3[7]. Muxed with external interrupt 3 (INT3, falling-edge only, power-down wake-up capable), alternate UART transmit (TxD_2), and CCP2 default/alternate mapping (CCP2 and CCP2_2 capture/PWM channel 2). |
| 19 | P1.0/ADC0/CCP1 | bidirectional | Standard I/O PORT1[0]. Muxed with ADC input channel 0 and CCP1 default mapping (capture/high-speed pulse output/PWM channel 1). |
| 20 | P1.1/ADC1/CCP0 | bidirectional | Standard I/O PORT1[1]. Muxed with ADC input channel 1 and CCP0 default mapping (capture/high-speed pulse output/PWM channel 0). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STC Micro |
| Package | TSSOP-20 |
| Category | MCU |
| Pins | 20 |
Ordering variants
Same part, different packaging or reel option.
STC15W408AS-35I-TSSOP20STC15W408AS-35I-SOP20STC15W408AS-35I-DIP20STC15W408AS-35I-SOP16STC15W408AS-35I-DIP16STC15W408AS-35I-SOP28STC15W408AS-35I-TSSOP28STC15W408AS-35I-SKDIP28STC15W408AS-35I-QFN28
CAD (KiCad official)
- Symbol:
STC15W408AS-35I-TSSOP20 - Footprint:
Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm - 3D model: TSSOP-20 (KiCad packages3D, STEP)
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
stc15w408as-35i-tssop20.step |
267 KB | You want the bare part, or you mark your own boards. |
stc15w408as-35i-tssop20-etched.step |
5.0 MB | You want the part with STC15W408AS-35I-TSSOP20 already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 1212 faces against 327 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STC Micro datasheet (1219 pp, sha256
cc8c299c891646e0, retrieved 2026-08-17, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).