Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity

3D Model

Open in new tab ↗

Loads on click. Unloads only if this page sits in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗

Loads on click. Unloads only if this page sits in the background.

PCB Footprint

Open full view ↗

Loads on click. Unloads only if this page sits in the background.

Datasheet

Open in new tab ↗

Loads on click. Unloads only if this page sits in the background.

Download PDF

Contents

Pinout
Key specifications
CAD (KiCad official)
Provenance

README

markdown

STM8S207CBT6

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)

STM8S207CBT6 from STMicroelectronics, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	NRST	tri_state	Reset pin with internal pull-up; actively driven low for device reset
2	PA1/OSCIN	input	Crystal resonator input or external clock input for oscillator
3	PA2/OSCOUT	output	Crystal resonator output for oscillator
4	VSSIO_1	power_in	I/O section ground connection
5	VSS	power_in	Digital logic ground
6	VCAP	passive	External capacitor connection for internal 1.8 V regulator, 470 nF to 3.3 µF
7	VDD	power_in	Digital power supply, 2.95 to 5.5 V
8	VDDIO_1	power_in	I/O section power supply
9	PA3/TIM2_CH3	bidirectional	GPIO port A pin 3 or timer 2 channel 3 output; remappable to timer 3 channel 1
10	PA4/UART1_RX	input	GPIO port A pin 4 or UART1 receive input; high-sink output capability
11	PA5/UART1_TX	output	GPIO port A pin 5 or UART1 transmit output; high-sink output capability
12	PA6/UART1_CK	output	GPIO port A pin 6 or UART1 synchronous clock output; high-sink output capability
13	VDDA	power_in	Analog power supply for 10-bit ADC, 2.75 to 5.5 V
14	VSSA	power_in	Analog ground
15	PB7/AIN7	input	GPIO port B pin 7 or ADC analog input channel 7
16	PB6/AIN6	input	GPIO port B pin 6 or ADC analog input channel 6
17	PB5/AIN5	input	GPIO port B pin 5 or ADC analog input channel 5; remappable to I2C SDA
18	PB4/AIN4	input	GPIO port B pin 4 or ADC analog input channel 4; remappable to I2C SCL
19	PB3/AIN3	input	GPIO port B pin 3 or ADC analog input channel 3; remappable to timer 1 external trigger
20	PB2/AIN2	input	GPIO port B pin 2 or ADC analog input channel 2; remappable to timer 1 channel 3 complement
21	PB1/AIN1	input	GPIO port B pin 1 or ADC analog input channel 1; remappable to timer 1 channel 2 complement
22	PB0/AIN0	input	GPIO port B pin 0 or ADC analog input channel 0; remappable to timer 1 channel 1 complement
23	PE7/AIN8	input	GPIO port E pin 7 or ADC analog input channel 8
24	PE6/AIN9	input	GPIO port E pin 6 or ADC analog input channel 9
25	PE5/SPI_NSS	bidirectional	GPIO port E pin 5 or SPI master/slave select input
26	PC1/TIM1_CH1	bidirectional	GPIO port C pin 1 or timer 1 channel 1 output; high-sink output capability
27	PC2/TIM1_CH2	bidirectional	GPIO port C pin 2 or timer 1 channel 2 output; high-sink output capability
28	PC3/TIM1_CH3	bidirectional	GPIO port C pin 3 or timer 1 channel 3 output; high-sink output capability
29	PC4/TIM1_CH4	bidirectional	GPIO port C pin 4 or timer 1 channel 4 output; high-sink output capability
30	PC5/SPI_SCK	bidirectional	GPIO port C pin 5 or SPI clock output; high-sink output capability
31	VSSIO_2	power_in	I/O section ground connection
32	VDDIO_2	power_in	I/O section power supply
33	PC6/SPI_MOSI	bidirectional	GPIO port C pin 6 or SPI master out/slave in; high-sink output capability
34	PC7/SPI_MISO	bidirectional	GPIO port C pin 7 or SPI master in/slave out; high-sink output capability
35	PG0/CAN_TX	bidirectional	GPIO port G pin 0 or CAN transmit output; available on STM8S208 only
36	PG1/CAN_RX	bidirectional	GPIO port G pin 1 or CAN receive input; available on STM8S208 only
37	PE3/TIM1_BKIN	input	GPIO port E pin 3 or timer 1 break input
38	PE2/I2C_SDA	tri_state	GPIO port E pin 2 (true open-drain) or I2C data line
39	PE1/I2C_SCL	tri_state	GPIO port E pin 1 (true open-drain) or I2C clock line
40	PE0/CLK_CCO	output	GPIO port E pin 0 or configurable clock output; high-sink output capability
41	PD0/TIM3_CH2	bidirectional	GPIO port D pin 0 or timer 3 channel 2 output; high-sink output; remappable to timer 1 break input or clock output
42	PD1/SWIM	bidirectional	GPIO port D pin 1 or SWIM debug single-wire interface; input pull-up during reset; high-sink output
43	PD2/TIM3_CH1	bidirectional	GPIO port D pin 2 or timer 3 channel 1 output; high-sink output; remappable to timer 2 channel 3
44	PD3/TIM2_CH2	bidirectional	GPIO port D pin 3 or timer 2 channel 2 output; high-sink output; remappable to ADC external trigger
45	PD4/TIM2_CH1	bidirectional	GPIO port D pin 4 or timer 2 channel 1 output; high-sink output; remappable to beeper output
46	PD5/UART3_TX	output	GPIO port D pin 5 or UART3 transmit output
47	PD6/UART3_RX	input	GPIO port D pin 6 or UART3 receive input
48	PD7/TLI	input	GPIO port D pin 7 or external top-level interrupt input; remappable to timer 1 channel 4

Key specifications

Parameter	Value
Manufacturer	STMicroelectronics
Package	LQFP-48(7x7)
Category	Embedded Processors & Controllers
Pins	48

CAD (KiCad official)

Symbol: STM8S207CBT6
Footprint: Package_QFP:LQFP-48_7x7mm_P0.5mm
3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
3D model files: stm8s207cbt6-etched.step / stm8s207cbt6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm8s207cbt6.step / stm8s207cbt6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: STMicroelectronics datasheet (103 pp, sha256 9ab3f7b6dda7af91, retrieved 2026-09-24, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF