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SN74HC377DWR

Texas Instruments · Flip Flops · SOIC-20-300mil

SN74HC377DWR from Texas Instruments, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CLKEN input Active-low latched clock enable. When CLKEN is low, the rising edge of CLK transfers D-input data to the Q outputs; when CLKEN is high, outputs hold their previous state. Input structure prevents false clocking from CLKEN transitions.
2 1Q output Flip-flop 1 single-rail data output. Follows 1D on the rising edge of CLK when CLKEN is low. CMOS push-pull output rated ±4 mA at VCC = 5 V.
3 1D input Flip-flop 1 data input. Sampled on the rising edge of CLK when CLKEN is low. High-impedance CMOS input (II = ±1 µA max).
4 2D input Flip-flop 2 data input. Sampled on the rising edge of CLK when CLKEN is low. High-impedance CMOS input (II = ±1 µA max).
5 2Q output Flip-flop 2 single-rail data output. Follows 2D on the rising edge of CLK when CLKEN is low. CMOS push-pull output rated ±4 mA at VCC = 5 V.
6 3Q output Flip-flop 3 single-rail data output. Follows 3D on the rising edge of CLK when CLKEN is low. CMOS push-pull output rated ±4 mA at VCC = 5 V.
7 3D input Flip-flop 3 data input. Sampled on the rising edge of CLK when CLKEN is low. High-impedance CMOS input (II = ±1 µA max).
8 4D input Flip-flop 4 data input. Sampled on the rising edge of CLK when CLKEN is low. High-impedance CMOS input (II = ±1 µA max).
9 4Q output Flip-flop 4 single-rail data output. Follows 4D on the rising edge of CLK when CLKEN is low. CMOS push-pull output rated ±4 mA at VCC = 5 V.
10 GND power_in Device ground return. Tie to system 0 V. Continuous current through GND limited to ±50 mA (absolute max).
11 CLK input Clock input. Rising edge (positive-going) transfers D-input data to the Q outputs when CLKEN is low. Level-sensitive triggering at a specific voltage threshold, not related to CLK edge rate.
12 5Q output Flip-flop 5 single-rail data output. Follows 5D on the rising edge of CLK when CLKEN is low. CMOS push-pull output rated ±4 mA at VCC = 5 V.
13 5D input Flip-flop 5 data input. Sampled on the rising edge of CLK when CLKEN is low. High-impedance CMOS input (II = ±1 µA max).
14 6D input Flip-flop 6 data input. Sampled on the rising edge of CLK when CLKEN is low. High-impedance CMOS input (II = ±1 µA max).
15 6Q output Flip-flop 6 single-rail data output. Follows 6D on the rising edge of CLK when CLKEN is low. CMOS push-pull output rated ±4 mA at VCC = 5 V.
16 7Q output Flip-flop 7 single-rail data output. Follows 7D on the rising edge of CLK when CLKEN is low. CMOS push-pull output rated ±4 mA at VCC = 5 V.
17 7D input Flip-flop 7 data input. Sampled on the rising edge of CLK when CLKEN is low. High-impedance CMOS input (II = ±1 µA max).
18 8D input Flip-flop 8 data input. Sampled on the rising edge of CLK when CLKEN is low. High-impedance CMOS input (II = ±1 µA max).
19 8Q output Flip-flop 8 single-rail data output. Follows 8D on the rising edge of CLK when CLKEN is low. CMOS push-pull output rated ±4 mA at VCC = 5 V.
20 VCC power_in Positive supply. Recommended operating range 2 V to 6 V; absolute maximum -0.5 V to 7 V. Typical ICC = 80 µA max (SN74HC377) at VI = VCC or 0.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-20-300mil
Category Logic
Pins 20

Ordering variants

Same part, different packaging or reel option.

  • SN74HC377DWR
  • SN74HC377DWRNSR
  • SN74HC377DWRN
  • SN74HC377DWRNE4
  • SN74HC377DWRJ
  • SN74HC377DWRFK
  • SN74HC377DWRW

CAD (KiCad official)

  • Symbol: SN74HC377DWR
  • Footprint: Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm
  • 3D model: SOIC-20-300mil (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (None pp, sha256 862938bee895ab54, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF