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Contents

README

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SN74AUP1G06DRLR

Texas Instruments · Inverters · SOT-553

SN74AUP1G06DRLR from Texas Instruments, in a SOT-553. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 NC unconnected No internal connection on this pin for the DRL package.
2 A input Single-inverter input with a 0 V to 3.6 V input voltage range and standard CMOS input behavior, so slow or floating inputs should be avoided.
3 GND power_in Ground reference pin for the device.
4 Y output Open-drain output that goes high only through an external pull-up resistor, with output voltage limited to 0 V to 3.6 V.
5 VCC power_in Positive supply pin; the recommended operating supply range is 0.8 V to 3.6 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOT-553
Category Logic
Pins 5

CAD (KiCad official)

  • Symbol: SN74AUP1G06DRLR
  • Footprint: Package_TO_SOT_SMD:SOT-553
  • 3D model: SOT-553 (KiCad packages3D, STEP)
  • 3D model files: sn74aup1g06drlr-etched.step / sn74aup1g06drlr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74aup1g06drlr.step / sn74aup1g06drlr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (52 pp, sha256 22c139293d086fb2, retrieved 2026-10-11, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF