VPC28C40 from VPSC, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	COMP	output	Error-amplifier compensation pin that can source and sink current, with a 15 mA maximum error-amplifier sink current, and forcing COMP to ground controls zero duty cycle because the amplifier is internally current-limited.
2	FB	input	Inverting input of the internal error amplifier, referenced to 2.5 V (2.475 V to 2.525 V at 25 °C), used to close the voltage feedback loop for stability and kept as short as possible.
3	CS	input	Primary-side current-sense input to the PWM comparator, where the recommended CS voltage is up to 1 V and the comparator threshold is 0.9 V to 1.1 V, and an RC filter may be needed to suppress leading-edge spikes.
4	RT/CT	passive	Oscillator timing pin where RT connects from VREF and CT connects to GND, setting fOSC ≈ 1.6/(RT×CT) with RT never below 5 kΩ and operation up to 1 MHz.
5	GND	power_in	Analog and signal ground that also serves as power ground because this SOP-8 package has no separate PGND pin.
6	OUT	output	Push-pull gate-driver output that sources and sinks up to 1 A peak to drive an external MOSFET directly, held low while VDD is below the turn-on threshold, with an absolute maximum of 30 V to GND.
7	VDD	power_in	Controller bias supply that should stay below the 28 V recommended maximum, with a 30 V absolute maximum and an internal clamp of about 30 V to 34 V at 25 mA, and needs a 0.1 µF bypass capacitor placed close to the pin.
8	VREF	power_out	5 V reference output (4.90 V to 5.10 V at 1 mA) that requires a minimum 0.1 µF ceramic bypass capacitor close to the pin and is rated for a recommended output current of -20 mA.

Key specifications

Parameter	Value
Manufacturer	VPSC
Package	SOP-8
Category	Power Management (PMIC)
Pins	8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
输入电压 VDD	VDD			30	V		2
输入电流 VDD				30	mA		2
输出峰值电流		-1		1	A		2
模拟引脚对 GND (COMP、CS、FB、RT/CT)		-0.3		6	V		2
基准电压对 GND (VREF)				6.6	V		2
输出引脚对 GND (OUT)		-0.3		30	V		2
误差放大器输出吸入电流				15	mA		2
最大工作结温	TJMAX			150	℃		2
ESD 人体模式 HBM	V(ESD)	-3000		3000	V	HBM, per ESDA/JEDEC JS-001-2017	3
ESD 机器模式 CDM	V(ESD)	-1000		1000	V	CDM, per ESDA/JEDEC JS-002-2014	3
输入电压	VVDD			28	V		3
FB 基准电压	VFB		2.5		V		3
电流采样输入	VCS		1		V		3
电源电流	IVDD			25	mA		3
输出平均电流	IOUT			200	mA		3
基准电源输出电流	IVREF	-20			mA		3
振荡器频率	fOSC			1	MHz		3
工作温度 VPC28C4x		-40		105	℃	VPC28C4x	3
基准电压 VREF	VREF	4.9	5	5.1	V	IVREF = 1 mA, TJ = 25°C	4
线性调整	∆VREF		2	20	mV	12≤VDD≤25V	4
负载调整	∆VREF		3	25	mV	1mA≤IVREF≤20mA	4
温度系数	∆VREF/∆T		0.2	0.4	mV/℃		4
输出总变化		4.82		5.18	V	线性、负载、温度	4
长期稳定性			5	25	mV	1000 小时, TA= 125°C	4
短路电流	ISC	-30	-50	-70	mA		4
频率 (RT=10kΩ, CT=3.3nF)	fOSC	49	52	55	kHz	TA=25℃，RT=10kΩ，CT=3.3nF	4
频率 (RT=6.2kΩ, CT=1.0nF)	fOSC	225	250	275	kHz	TA=25℃，RT=6.2kΩ，CT=1.0nF	4
随电压的变化	∆fOSC/∆V		0.2	1	%	12V≤VDD≤25V	4
随温度的变化	∆fOSC/∆T		1	2.5	%	-40℃≤TA≤125℃	4
RT/CT 下拉电流	Idischarge	7.8	8.3	8.8	mA	TJ = 25°C	4
RT/CT 下拉电流 (全温度)	Idischarge	7.6		9	mA	-40℃≤TA≤125℃	4
FB 基准电压	VFB	2.475	2.5	2.525	V	VCOMP=2.5V, TA=25℃	4
输入偏置电流	IFB		-0.1	-1	uA	VFB=5V	4
开环增益	AVOL	70	95		dB	2V≤VO≤4V	4
单位增益带宽	BW		0.7	1	MHz	TJ = 25°C	4
电源信噪比 (误差放大器)	PSRR	60	70		dB	12V≤VDD≤25V	4
输入电流 (sink)	ICOMP(SNK)	2	10		mA	VFB=2.7V，VFB=1.1V	4
输出电流 (source)	ICOMP(SRC)		-0.5	-1	mA	VFB=2.3V，VFB=5V	4
VOUT 高电平	VOH	5.4	6	6.6	V	VFB=2.3V，RCOMP=15kΩ到地	4
VOUT 低电平	VOL		0.1	0.5	V	VFB=2.7V，RCOMP=15kΩ到 8 脚	4
电流采样增益	ACS	2.85	3	3.15	V/V		4
最大比较阈值电压	VCS_th	0.9	1	1.1	V	VFB＜2.4V	4
CS 输入偏置电流	ICS		-0.1	-2	uA		4
CS 到 OUT 延迟	tD		30	65	nS	VCS从 0 跳变至 2V	4
输出低电平内阻	RDSON(OL)		4	10	Ω	ISINK=200mA	4
输出高电平内阻	RDSON(OH)		8	16	Ω	ISOURCE=200mA	4
UVLO 下拉电流	IOUT(SNK)		100	300	mA	VDD=6V，VOUT=1V	4
上升时间	tr		30	55	nS	TJ=25℃，CL=1nF	4
下降时间	tf		20	40	nS	TJ=25℃，CL=1nF	4
启动阈值电压 (VPCx8C40/VPCx8C41)	VDD(ON)	6.5	7	7.5	V	VPCx8C40/VPCx8C41	5
欠压锁定阈值电压 (VPCx8C40/VPCx8C41)	VDD(OFF)	6.1	6.6	7.1	V	VPCx8C40/VPCx8C41	5
最大占空比 (VPCx8C42/VPCx8C43/VPCx8C40)	DMAX	94	96	100	%	VPCx8C42/VPCx8C43/VPCx8C40，VFB＜2.4V	5
最小占空比	DMIN	0	0		%	VFB＞2.6V	5
启动电流	IST		50	100	uA	VDD= VDD(ON)-0.5V	5
静态工作电流	IVDD		2.7	3.5	mA	VFB=VCS=0V ，VDD=VDD(ON)+0.5V	5
静态工作电流 (VDD=25V)	IVDD	8	14	17	mA	VFB=VCS=0V，VDD=25V	5
钳位电压	VDD(clamp)		30	34	V	IVDD=25mA	5

CAD (KiCad official)

Symbol: VPC28C40
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SOP-8 (KiCad packages3D, STEP)
3D model files: vpc28c40-etched.step / vpc28c40-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); vpc28c40.step / vpc28c40.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: VPSC datasheet (15 pp, sha256 41de8f28b106ea3c, retrieved 2026-11-04, tier: lcsc)
Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

VPC28C40

Verified VPC28C40

Verification log 1 record

3D Model

Symbol & Footprint

Schematic Symbol

PCB Footprint

Datasheet

README