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Contents

README

markdown

TPM20V6NLS3-1

TECH PUBLIC · MOSFETs · SOT-23

TPM20V6NLS3-1 from TECH PUBLIC, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate; gate-source voltage limit is ±12 V with threshold of 0.40 V min to 1 V max at VDS=VGS, ID=50 µA.
2 S passive Source; continuous drain current is 6 A and continuous source-drain diode current is 0.6 A.
3 D passive Drain; drain-source voltage is 20 V max with RDS(on) of 0.023 Ω max at VGS=4.5 V, ID=6 A.

Key specifications

Parameter Value
Manufacturer TECH PUBLIC
Package SOT-23
Category Transistors/Thyristors
Pins 3

CAD (KiCad official)

  • Symbol: TPM20V6NLS3-1
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)
  • 3D model files: tpm20v6nls3-1-etched.step / tpm20v6nls3-1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tpm20v6nls3-1.step / tpm20v6nls3-1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: TECH PUBLIC datasheet (4 pp, sha256 d8d36ac1c3d0873e, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF