Loads when you scroll to it. Unloads after 5 minutes in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

PCB Footprint

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Loads when you scroll to it. Unloads after 5 minutes in the background.
Download PDF
Contents

README

markdown

TPS54561DPRR

Texas Instruments · DC-DC Converters · WSON-10-EP(4x4)

TPS54561DPRR from Texas Instruments, in a WSON-10-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 BOOT output A bootstrap capacitor is required between BOOT and SW; if its voltage falls below the minimum needed to operate the high-side MOSFET, the gate drive is switched off until the capacitor is refreshed.
2 VIN power_in Input supply voltage with a 4.5-V to 60-V operating range.
3 EN input Enable pin with an internal pull-up current source; pull below 1.2 V to disable and float to enable, with input undervoltage lockout adjustable by two resistors.
4 SS/TR input Soft-start and tracking pin; an external capacitor sets the output rise time, and the voltage on this pin overrides the internal reference so it can be used for tracking and sequencing.
5 RT/CLK input Resistor timing and external clock pin; an external resistor to ground sets the switching frequency, and pulling the pin above the PLL upper threshold makes it a high-impedance synchronization clock input.
6 FB input Inverting input of the transconductance (gm) error amplifier.
7 COMP output Error amplifier output and input to the output switch current (PWM) comparator; frequency compensation components connect to this pin.
8 GND power_in Ground pin that must be electrically connected to the exposed thermal pad on the printed circuit board for proper operation.
9 SW output Source of the internal high-side power MOSFET and the switching node of the converter.
10 PWRGD output Open-drain Power Good output that asserts low if the output is out of regulation due to thermal shutdown, dropout, over-voltage, or EN shutdown.
11 Thermal Pad power_in Exposed thermal pad that must be electrically connected to GND on the printed circuit board for proper operation.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package WSON-10-EP(4x4)
Category Power Management (PMIC)
Pins 11

CAD (KiCad official)

  • Symbol: TPS54561DPRR
  • Footprint: Package_SON:WSON-10-1EP_4x4mm_P0.8mm_EP2.6x3mm
  • 3D model: WSON-10-EP(4x4) (KiCad packages3D, STEP)
  • 3D model files: tps54561dprr-etched.step / tps54561dprr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps54561dprr.step / tps54561dprr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (55 pp, sha256 100a710f731868d0, retrieved 2026-10-10, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF