component
M24C64-DFDW6TP
Public Made by Adomby adom
STMicroelectronics EEPROM, TSSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
PCB Footprint
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
Datasheet
Open in new tab ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
Contents
README
markdownM24C64-DFDW6TP
STMicroelectronics · EEPROM · TSSOP-8
M24C64-DFDW6TP from STMicroelectronics, in a TSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | E0 | input | Chip Enable input (Table 1); one of the three bits that set the device select code, and it must be held at a defined level for the device to be addressed. |
| 2 | E1 | input | Chip Enable input (Table 1); one of the three bits that set the device select code, and it must be held at a defined level for the device to be addressed. |
| 3 | E2 | input | Chip Enable input (Table 1); one of the three bits that set the device select code, and it must be held at a defined level for the device to be addressed. |
| 4 | VSS | power_in | Ground reference for the device (Table 1). |
| 5 | SDA | bidirectional | Serial Data I/O of the I2C bus (Table 1); when driven low it sinks up to 5 mA maximum (IOL, Table 8). |
| 6 | SCL | input | Serial Clock input of the I2C bus (Table 1); clock frequency up to 1 MHz when VCC is at least 1.7 V (Table 11). |
| 7 | WC | input | Write Control input (Table 1); when high, data writes are inhibited (Figure 11 WC = 1 case). |
| 8 | VCC | power_in | Supply voltage (Table 1); 1.7 V to 5.5 V for voltage range F, which covers this MPN (Table 11). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | TSSOP-8 |
| Category | Memory |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Ambient operating temperature | -40 | 130 | °C | 24 | |||
| Storage temperature | TSTG | -65 | 150 | °C | 24 | ||
| DC output current (SDA = 0) | IOL | 5 | mA | SDA = 0 | 24 | ||
| Input or output range | VIO | -0.5 | 6.5 | V | 24 | ||
| Supply voltage | VCC | -0.5 | 6.5 | V | 24 | ||
| Electrostatic pulse (Human Body model) | VESD | 3000 | V | AEC-Q100-002, C1=100 pF, R1=1500 Ω | 24 | ||
| Supply voltage (voltage range F) | VCC | 1.7 | 5.5 | V | Voltage range F | 25 | |
| Ambient operating temperature: READ | TA | -40 | 85 | °C | READ | 25 | |
| Ambient operating temperature: WRITE | TA | 0 | 85 | °C | WRITE | 25 | |
| Operating clock frequency | fC | 1000 | kHz | VCC ≥ 1.7 V | 25 | ||
| Load capacitance | Cbus | 100 | pF | 25 | |||
| SCL input rise/fall time, SDA input fall time | 50 | ns | 25 | ||||
| Input capacitance (SDA) | CIN | 8 | pF | 26 | |||
| Input capacitance (other pins) | CIN | 6 | pF | 26 | |||
| Input impedance (E2, E1, E0, WC) when selected | ZL | 30 | kΩ | VIN < 0.3 VCC | 26 | ||
| Input impedance (E2, E1, E0, WC) when selected | ZH | 500 | kΩ | VIN > 0.7 VCC | 26 | ||
| Write cycle endurance | Ncycle | 4e+06 | Write cycle | TA ≤ 25 °C, VCC(min) < VCC < VCC(max) | 26 | ||
| Write cycle endurance | Ncycle | 1.2e+06 | Write cycle | TA = 85 °C, VCC(min) < VCC < VCC(max) | 26 | ||
| Data retention | 200 | Year | TA = 55 °C | 26 | |||
| Input leakage current (E1, E2, SCL, SDA) | ILI | -2 | 2 | µA | VIN = VSS or VCC, device in Standby mode | 29 | |
| Output leakage current | ILO | -2 | 2 | µA | SDA in Hi-Z, external voltage applied on SDA: VSS or VCC | 29 | |
| Supply current (Read) | ICC | 0.8 | mA | VCC = 1.6 V or 1.7 V, fC = 400 kHz | 29 | ||
| Supply current (Write) | ICC0 | 1.5 | mA | During tW, VCC < 2.5 V | 29 | ||
| Standby supply current | ICC1 | 1 | µA | Device not selected, VIN = VSS or VCC, VCC = 1.6 V or 1.7 V | 29 | ||
| Input low voltage (SCL, SDA, WC, Ei); printed max 0.25 VCC | VIL | -0.45 | 0.25 | V | VCC < 2.5 V | 29 | |
| Input high voltage (SCL, SDA); printed min 0.75 VCC | VIH | 0.75 | 6.5 | V | VCC < 2.5 V | 29 | |
| Input high voltage (WC, E2, E1, E0); printed min 0.75 VCC, max VCC+0.6 V | VIH | 0.75 | V | VCC < 2.5 V | 29 | ||
| Output low voltage | VOL | 0.2 | V | IOL = 1 mA, VCC = 1.6 V or 1.7 V | 29 | ||
| Clock frequency (400 kHz AC) | fC | 400 | kHz | 30 | |||
| Clock pulse width high | tCHCL | 600 | ns | 30 | |||
| Clock pulse width low | tCLCH | 1300 | ns | 30 | |||
| SDA (out) fall time | tQL1QL2 | 20 | 300 | ns | CL = 10 pF | 30 | |
| Data in set up time | tDXCH | 100 | ns | 30 | |||
| Data in hold time | tCLDX | 0 | ns | 30 | |||
| Data out hold time | tCLQX | 50 | ns | 30 | |||
| Clock low to next data valid (access time) | tCLQV | 900 | ns | Rbus × Cbus within Figure 15 limits | 30 | ||
| Start condition setup time | tCHDL | 600 | ns | 30 | |||
| Start condition hold time | tDLCL | 600 | ns | 30 | |||
| Stop condition set up time | tCHDH | 600 | ns | 30 | |||
| Time between Stop condition and next Start condition | tDHDL | 1300 | ns | 30 | |||
| WC set up time (before the Start condition) | tWLDL | 0 | µs | WC=0 to enable WRITE command | 30 | ||
| WC hold time (after the Stop condition) | tDHWH | 1 | µs | WC=0 to enable WRITE command | 30 | ||
| Internal Write cycle duration | tW | 5 | ms | 30 | |||
| Pulse width ignored (input filter on SCL and SDA) | tNS | 50 | ns | Single glitch | 30 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | Lead temperature during soldering see note(1) 1. Compliant with JEDEC Std J-STD-020D (for small body, Sn-Pb or Pb-free assembly), the ST ECOPACK2® | 24 |
CAD (KiCad official)
- Symbol:
M24C64-DFDW6TP - Footprint:
Package_SO:TSSOP-8_4.4x3mm_P0.65mm - 3D model: TSSOP-8 (KiCad packages3D, STEP)
- 3D model files:
m24c64-dfdw6tp-etched.step/m24c64-dfdw6tp-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);m24c64-dfdw6tp.step/m24c64-dfdw6tp.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (54 pp, sha256
297d3d80b153effd, retrieved 2026-11-05, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).