component
GM12045ARDZ-R7
Public Made by Adomby adom
GONGMOSEMI Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownGM12045ARDZ-R7
GONGMOSEMI · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOIC-8
GM12045ARDZ-R7 from GONGMOSEMI, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT | power_out | Regulated output; a 10μF or larger ceramic capacitor should be placed between OUT and GND as close to the pin as possible for stability. |
| 2 | SENSE/ADJ | input | Feedback pin to the error amplifier; the ADJ pin is held at 1.21V relative to ground, and the external adjustable output range is 1.21V to 20V. |
| 3 | GND | power_in | Ground. |
| 4 | NC | unconnected | Not connected. |
| 5 | SHDN | input | Shutdown pin: pulling high enables the device and pulling low disables it; if the enable function is not needed, this pin must be connected to IN. |
| 6 | GND | power_in | Ground. |
| 7 | GND | power_in | Ground. |
| 8 | IN | power_in | Input pin; a 10μF or larger ceramic capacitor (7μF or larger) should be placed from IN to GND, as close to the pin as possible, to reduce input impedance. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | GONGMOSEMI |
| Package | SOIC-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| ADJ pin voltage accuracy | VADJ | 1.18 | 1.21 | 1.24 | V | 1.9V < VIN < 20V, 1mA < ILOAD < 500mA | 7 |
| Input and SHDN pin voltage to GND | -0.3 | 22 | V | IN, SHDN to GND | 6 | ||
| OUT pin voltage to GND | -0.3 | 22 | V | OUT to GND | 6 | ||
| SENSE/ADJ pin voltage to GND | -0.3 | 6 | V | SENSE/ADJ to GND | 6 | ||
| Storage temperature range | -65 | 150 | °C | 6 | |||
| Operating temperature range | -40 | 125 | °C | 6 | |||
| Thermal resistance junction to ambient, 8-pin SOIC | θJA | 67 | °C/W | 8-pin SOIC, worst case, surface-mount on board | 6 | ||
| Thermal resistance junction to ambient, 8-pin SOIC (JEDEC 51-7 board) | θJA | 46.4 | °C/W | 8-pin SOIC, JEDEC 51-7 high-effective thermal conductivity four-layer test board, TA = 25°C | 12 | ||
| Input supply voltage range | VIN | 1.9 | 20 | V | 12 | ||
| Adjustable output voltage range | VOUT | 1.21 | 20 | V | adjustable output set by external resistors | 12 | |
| Thermal shutdown threshold | TSD | 155 | °C | junction temperature rising, typical | 11 | ||
| Thermal shutdown hysteresis | TSD_HYS | 15 | °C | junction temperature falling, typical | 11 |
CAD (KiCad official)
- Symbol:
GM12045ARDZ-R7 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
gm12045ardz-r7-etched.step/gm12045ardz-r7-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);gm12045ardz-r7.step/gm12045ardz-r7.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: GONGMOSEMI datasheet (15 pp, sha256
31f8ffb5963aef61, retrieved 2026-10-27, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).