SN74AVC4T774PWR from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	DIR1	input	Direction-control input for channel 1 (A1/B1). Referenced to VCCA. HIGH = A1 drives B1; LOW = B1 drives A1.
2	DIR2	input	Direction-control input for channel 2 (A2/B2). Referenced to VCCA.
3	A1	bidirectional	Channel 1 A-port I/O. Referenced to VCCA (1.1V-3.6V). Direction set by DIR1; forced high-Z when OE is HIGH.
4	A2	bidirectional	Channel 2 A-port I/O. Referenced to VCCA (1.1V-3.6V). Direction set by DIR2; forced high-Z when OE is HIGH.
5	A3	bidirectional	Channel 3 A-port I/O. Referenced to VCCA (1.1V-3.6V). Direction set by DIR3; forced high-Z when OE is HIGH.
6	A4	bidirectional	Channel 4 A-port I/O. Referenced to VCCA (1.1V-3.6V). Direction set by DIR4; forced high-Z when OE is HIGH.
7	DIR3	input	Direction-control input for channel 3 (A3/B3). Referenced to VCCA.
8	DIR4	input	Direction-control input for channel 4 (A4/B4). Referenced to VCCA.
9	OE	input	Active-low output enable. Pull OE HIGH to place all A- and B-port outputs in 3-state (high-impedance). Referenced to VCCA. Tie to VCCA through a pullup during power-up.
10	GND	power_in	Ground reference for the device.
11	B4	bidirectional	Channel 4 B-port I/O. Referenced to VCCB (1.1V-3.6V). Direction set by DIR4; forced high-Z when OE is HIGH.
12	B3	bidirectional	Channel 3 B-port I/O. Referenced to VCCB (1.1V-3.6V). Direction set by DIR3; forced high-Z when OE is HIGH.
13	B2	bidirectional	Channel 2 B-port I/O. Referenced to VCCB (1.1V-3.6V). Direction set by DIR2; forced high-Z when OE is HIGH.
14	B1	bidirectional	Channel 1 B-port I/O. Referenced to VCCB (1.1V-3.6V). Direction set by DIR1; forced high-Z when OE is HIGH.
15	VCCB	power_in	B-port supply rail. 1.1V ≤ VCCB ≤ 3.6V. Sets the logic reference for all B-side I/Os. Decouple with 0.1µF near the pin.
16	VCCA	power_in	A-port supply rail. 1.1V ≤ VCCA ≤ 3.6V. Also references the DIR1-DIR4 and OE control inputs. Decouple with 0.1µF near the pin.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	TSSOP-16
Category	Logic
Pins	16

Ordering variants

Same part, different packaging or reel option.

SN74AVC4T774PWR
SN74AVC4T774PWRRGYR
SN74AVC4T774PWRRSVR
SN74AVC4T774PWRBQBR
SN74AVC4T774PWRDYYR

CAD (KiCad official)

Symbol: SN74AVC4T774PWR
Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
3D model: TSSOP-16 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`sn74avc4t774pwr.step`	205 KB	You want the bare part, or you mark your own boards.
`sn74avc4t774pwr-etched.step`	2.5 MB	You want the part with `SN74AVC4T774PWR` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 668 faces against 255 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (43 pp, sha256 5a4b93d5306c4f39, retrieved 2026-08-17, tier: manufacturer)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF