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Contents

README

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MSP430FR2000IRLLR

Texas Instruments · Microcontrollers (MCU/MPU/SOC) · HVQFN-24-EP(3x3)

MSP430FR2000IRLLR from Texas Instruments, in a HVQFN-24-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 TEST/SBWTCK input Test mode pin for JTAG or Spy-Bi-Wire serial clock input
2 RST/NMI/SBWTDIO bidirectional Reset input (low-level active), non-maskable interrupt input, or Spy-Bi-Wire data input/output
3 DVCC power_in Digital power supply voltage
4 DVSS power_in Ground reference for digital power supply
5 P2.7/TB0CLK/XIN bidirectional General-purpose I/O port or external 32kHz crystal oscillator input or Timer_B clock input
6 NC unconnected No internal connection
7 P2.6/MCLK/XOUT bidirectional General-purpose I/O port or master clock output or external crystal oscillator output
8 P2.0/TB0.1/COUT bidirectional General-purpose I/O port or Timer_B capture/compare input or comparator output
9 NC unconnected No internal connection
10 NC unconnected No internal connection
11 P2.1/TB0.2 bidirectional General-purpose I/O port or Timer_B capture/compare input/output
12 NC unconnected No internal connection
13 P1.7/UCA0TXD/UCA0SIMO/TB0.2/TDO bidirectional General-purpose I/O port or UART transmit or SPI data output or Timer_B capture/compare or JTAG test data output or 1.2V reference voltage output
14 P1.6/UCA0RXD/UCA0SOMI/TB0.1/TDI/TCLK bidirectional General-purpose I/O port or UART receive or SPI data input or Timer_B capture/compare or JTAG test data input or test clock input
15 P1.5/UCA0CLK/TMS bidirectional General-purpose I/O port or UART/SPI clock input or JTAG test mode select input
16 P1.4/UCA0STE/TCK bidirectional General-purpose I/O port or UART/SPI slave transmit enable or JTAG test clock input
17 P1.3/UCA0TXD/UCA0SIMO/C3 bidirectional General-purpose I/O port or UART transmit or SPI data output or comparator positive input
18 NC unconnected No internal connection
19 P1.2/UCA0RXD/UCA0SOMI/TB0TRG/C2/Veref- bidirectional General-purpose I/O port or UART receive or SPI data input or Timer_B trigger or comparator negative input or ADC negative reference
20 P1.0/UCA0STE/SMCLK/C0 bidirectional General-purpose I/O port or UART/SPI slave select or master clock output or comparator positive input or 1.2V reference voltage output
21 NC unconnected No internal connection
22 NC unconnected No internal connection
23 P1.1/UCA0CLK/ACLK/C1 bidirectional General-purpose I/O port or UART/SPI clock or auxiliary clock output or comparator positive input
24 NC unconnected No internal connection
25 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package HVQFN-24-EP(3x3)
Category Embedded Processors & Controllers
Pins 25

CAD (KiCad official)

  • Symbol: MSP430FR2000IRLLR
  • Footprint: Package_DFN_QFN:QFN-24-1EP_3x3mm_P0.4mm_EP1.75x1.6mm
  • 3D model: HVQFN-24-EP(3x3) (KiCad packages3D, STEP)
  • 3D model files: msp430fr2000irllr-etched.step / msp430fr2000irllr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); msp430fr2000irllr.step / msp430fr2000irllr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (87 pp, sha256 7505f67fee2c23fa, retrieved 2026-10-06, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF