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AD7894BRZ-10
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Analog Devices Analog To Digital Converters (ADCs), SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownAD7894BRZ-10
Analog Devices · Analog To Digital Converters (ADCs) · SOIC-8
AD7894BRZ-10 from Analog Devices, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | REF IN | input | Voltage reference input, buffered on-chip, to which an external +2.5 V nominal reference is connected for the conversion process. |
| 2 | VIN | power_in | Analog input channel with a ±10 V input range for the AD7894-10 variant. |
| 3 | GND | power_in | Analog ground reference for the track/hold, comparator, digital circuitry and DAC. |
| 4 | SCLK | input | Serial clock input that clocks out a new data bit on each falling edge, with data valid for 10 ns after the falling edge, and it should be taken low at the end of transmission. |
| 5 | SDATA | tri_state | Serial data output providing 16 bits (two leading zeroes plus 14 conversion bits, twos complement for the AD7894-10) clocked out on falling SCLK edges and three-stated after the 16th falling edge. |
| 6 | BUSY | output | Conversion indicator that goes high on the falling edge of CONVST and returns low when the conversion is complete. |
| 7 | CONVST | input | Edge-triggered conversion start input where the falling edge puts the track/hold in hold mode and starts conversion, and if low at the end of conversion the part powers down. |
| 8 | VDD | power_in | Positive supply voltage, +5 V ± 5%. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | SOIC-8 |
| Category | ADC/DAC/Data Conversion |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Signal to (Noise + Distortion) Ratio | SNR | 78 | dB | @ +25°C, fIN = 70 kHz sine, fSAMPLE = 160 kHz | 2 | ||
| Signal to (Noise + Distortion) Ratio TMIN to TMAX | SNR | 77 | dB | TMIN to TMAX, fIN = 70 kHz sine, fSAMPLE = 160 kHz | 2 | ||
| Total Harmonic Distortion | THD | -86 | dB | fIN = 10 kHz sine, fSAMPLE = 160 kHz | 2 | ||
| Relative Accuracy | -1.5 | 1.5 | LSB | 2 | |||
| Differential Nonlinearity | -1 | 1.5 | LSB | 2 | |||
| Positive Gain Error | -6 | 6 | LSB | AD7894-10, AD7894-3 only | 2 | ||
| Negative Gain Error | -6 | 6 | LSB | AD7894-10, AD7894-3 only | 2 | ||
| Bipolar Zero Error | -8 | 8 | LSB | AD7894-10, AD7894-3 only | 2 | ||
| Analog Input Current | 2 | mA | AD7894-10, See Analog Input Section | 2 | |||
| Analog Input Voltage Range | -10 | 10 | V | AD7894-10 | 2 | ||
| REF IN Input Voltage Range | 2.375 | 2.5 | 2.625 | V | 2.5 V ± 5% | 2 | |
| REF IN Input Current | 1 | µA | 2 | ||||
| REF IN Input Capacitance | 10 | pF | Sample tested @ +25°C | 2 | |||
| Input High Voltage | VINH | 2.4 | V | VDD = 5 V ± 5% | 2 | ||
| Input Low Voltage | VINL | 0.8 | V | VDD = 5 V ± 5% | 2 | ||
| Logic Input Current | IIN | -10 | 10 | µA | VIN = 0 V to VDD | 2 | |
| Logic Input Capacitance | CIN | 10 | pF | Sample tested @ +25°C | 2 | ||
| Output High Voltage | VOH | 4 | V | ISOURCE = 400 µA | 2 | ||
| Output Low Voltage | VOL | 0.4 | V | ISINK = 1.6 mA | 2 | ||
| Conversion Time Mode 1 | 5 | µs | Mode 1 Operation | 2 | |||
| Conversion Time Mode 2 | 10 | µs | Mode 2 Operation | 2 | |||
| Track/Hold Acquisition Time | 0.35 | µs | 2 | ||||
| Supply Current | IDD | 5.5 | mA | Digital inputs @ VDD, VDD = 5 V ± 5% | 3 | ||
| Power Dissipation | 20 | 27.5 | mW | 3 | |||
| Power-Down IDD | IDD | 20 | µA | TMIN to TMAX, digital inputs @ GND, VDD = 5 V ± 5% | 3 | ||
| Power-Down Power Dissipation | 15 | 100 | µW | TMIN to TMAX | 3 | ||
| CONVST Pulsewidth | t1 | 40 | ns | VDD = 5 V ± 5% | 3 | ||
| Data Access Time after Falling Edge of SCLK | t4 | 60 | ns | VDD = 5 V ± 5% | 3 | ||
| Data Hold Time after Falling Edge of SCLK | t5 | 10 | ns | VDD = 5 V ± 5% | 3 | ||
| Bus Relinquish Time after Falling Edge of SCLK | t6 | 20 | ns | VDD = 5 V ± 5% | 3 | ||
| VDD to GND | VDD | -0.3 | 7 | V | TA = +25°C | 3 | |
| Analog Input Voltage to GND | VIN | -17 | 17 | V | AD7894-10 | 3 | |
| Reference Input Voltage to GND | -0.3 | V | -0.3 V to VDD + 0.3 V | 3 | |||
| Digital Input Voltage to GND | -0.3 | V | -0.3 V to VDD + 0.3 V | 3 | |||
| Digital Output Voltage to GND | -0.3 | V | -0.3 V to VDD + 0.3 V | 3 | |||
| Operating Temperature Range | -40 | 85 | °C | Commercial (A, B Versions) | 3 | ||
| Storage Temperature Range | -65 | 150 | °C | 3 | |||
| Junction Temperature | 150 | °C | 3 | ||||
| SOIC Package Power Dissipation | 450 | mW | 3 | ||||
| Lead Temperature, Vapor Phase | 215 | °C | 60 sec | 3 | |||
| Lead Temperature, Infrared | 220 | °C | 15 sec | 3 | |||
| Thermal Impedance | θJA | 170 | °C/W | SOIC package | 3 | ||
| Peak Harmonic or Spurious Noise | -92 | dB | fIN = 10 kHz sine, fSAMPLE = 160 kHz | 2 | |||
| IMD 2nd Order Terms | IMD | -92 | dB | fa = 9 kHz, fb = 9.5 kHz, fSAMPLE = 160 kHz | 2 | ||
| IMD 3rd Order Terms | IMD | -92 | dB | fa = 9 kHz, fb = 9.5 kHz, fSAMPLE = 160 kHz | 2 | ||
| -3 dB Small Signal Bandwidth | 7.5 | MHz | 2 | ||||
| Aperture Jitter | 50 | ps | 2 |
CAD (KiCad official)
- Symbol:
AD7894BRZ-10 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
ad7894brz-10-etched.step/ad7894brz-10-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ad7894brz-10.step/ad7894brz-10.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (12 pp, sha256
78b80c261686698b, retrieved 2026-10-31, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).