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SN754410NE
Public Made by Adomby adom
Texas Instruments Gate Drive ICs, PDIP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
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Datasheet
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README
markdownSN754410NE
Texas Instruments · Gate Drive ICs · PDIP-16
SN754410NE from Texas Instruments, in a PDIP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1,2EN | input | Enable input for driver channels 1 and 2; active high, and when low the outputs of those drivers are disabled and in a high-impedance state. |
| 2 | 1A | input | Non-inverting driver input for channel 1, compatible with TTL and low-level CMOS logic. |
| 3 | 1Y | output | Driver output for channel 1, rated for up to 1 A continuous output current per driver. |
| 4 | GND | power_in | Device ground and heat sink pin, to be connected to the circuit board ground plane with multiple solid vias. |
| 5 | GND | power_in | Device ground and heat sink pin, to be connected to the circuit board ground plane with multiple solid vias. |
| 6 | 2Y | output | Driver output for channel 2, rated for up to 1 A continuous output current per driver. |
| 7 | 2A | input | Non-inverting driver input for channel 2, compatible with TTL and low-level CMOS logic. |
| 8 | VCC2 | power_in | Output-driver supply voltage for the drivers, 4.5 V to 36 V. |
| 9 | 3,4EN | input | Enable input for driver channels 3 and 4; active high, and when low the outputs of those drivers are disabled and in a high-impedance state. |
| 10 | 3A | input | Non-inverting driver input for channel 3, compatible with TTL and low-level CMOS logic. |
| 11 | 3Y | output | Driver output for channel 3, rated for up to 1 A continuous output current per driver. |
| 12 | GND | power_in | Device ground and heat sink pin, to be connected to the circuit board ground plane with multiple solid vias. |
| 13 | GND | power_in | Device ground and heat sink pin, to be connected to the circuit board ground plane with multiple solid vias. |
| 14 | 4Y | output | Driver output for channel 4, rated for up to 1 A continuous output current per driver. |
| 15 | 4A | input | Non-inverting driver input for channel 4, compatible with TTL and low-level CMOS logic. |
| 16 | VCC1 | power_in | 5 V logic supply for the internal logic translation, recommended 4.5 V to 5.5 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | PDIP-16 |
| Category | Power Management ICs |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output supply voltage range (VCC1) | VCC1 | -0.5 | 36 | V | 4 | ||
| Output supply voltage range (VCC2) | VCC2 | -0.5 | 36 | V | 4 | ||
| Input voltage | VI | -0.5 | 36 | V | 4 | ||
| Output voltage range | VO | -3 | V | 4 | |||
| Peak output current | IP | -2 | 2 | A | 4 | ||
| Continuous output current | IO | -1 | 1 | A | 4 | ||
| Continuous total power dissipation | PD | 2075 | mW | at (or below) 25°C free-air temperature | 4 | ||
| Operating free-air temperature range | TA | -40 | 85 | °C | 4 | ||
| Operating virtual junction temperature range | TJ | -40 | 150 | °C | 4 | ||
| Storage temperature range | Tstg | 260 | °C | 4 | |||
| Logic supply voltage | VCC1 | 4.5 | 5.5 | V | 4 | ||
| Output supply voltage | VCC2 | 4.5 | 36 | V | 4 | ||
| High-level input voltage | VIH | 2 | 5.5 | V | 4 | ||
| Low-level input voltage | VIL | -0.3 | 0.8 | V | 4 | ||
| Operating virtual junction temperature | TJ | -40 | 125 | °C | 4 | ||
| Operating free-air temperature | TA | -40 | 85 | °C | 4 | ||
| Input clamp voltage | VIK | -0.9 | -1.5 | V | II = -12 mA | 5 | |
| Low-level output voltage | VOL | 1 | 1.4 | V | IOL = 0.5 A | 5 | |
| Low-level output voltage | VOL | 2 | V | IOL = 1 A | 5 | ||
| Low-level output voltage | VOL | 1.2 | 1.8 | V | IOL = 1 A, TJ = 25°C | 5 | |
| Low-level output clamp voltage | VOKL | -1.1 | -2 | V | IOK = 0.5 A | 5 | |
| Low-level output clamp voltage | VOKL | -1.3 | -2.5 | V | IOK = -1 A | 5 | |
| Off-state high-impedance-state output current | IOZ(off) | 500 | µA | VO = VCC2 | 5 | ||
| Off-state high-impedance-state output current | IOZ(off) | -500 | µA | VO = 0 | 5 | ||
| High-level input current | IIH | 10 | µA | VI = 5.5 V | 5 | ||
| Low-level input current | IIL | -10 | µA | VI = 0 | 5 | ||
| Output supply current, all outputs at high level | ICC1 | 38 | mA | IO = 0 mA | 5 | ||
| Output supply current, all outputs at low level | ICC1 | 70 | mA | IO = 0 mA | 5 | ||
| Output supply current, all outputs at high impedance | ICC1 | 25 | mA | IO = 0 mA | 5 | ||
| Output supply current, all outputs at high level | ICC2 | 33 | mA | IO = 0 | 5 | ||
| Output supply current, all outputs at low level | ICC2 | 20 | mA | IO = 0 | 5 | ||
| Output supply current, all outputs at high impedance | ICC2 | 5 | mA | IO = 0 | 5 | ||
| Delay time, high-to-low-level output from A input | td1 | 400 | ns | VCC1 = 5 V, VCC2 = 24 V, CL = 30 pF, TA = 25°C | 5 | ||
| Delay time, low-to-high-level output from A input | td2 | 800 | ns | VCC1 = 5 V, VCC2 = 24 V, CL = 30 pF, TA = 25°C | 5 | ||
| Transition time, low-to-high-level output | tTLH | 300 | ns | VCC1 = 5 V, VCC2 = 24 V, CL = 30 pF, TA = 25°C | 5 | ||
| Transition time, high-to-low-level output | tTHL | 300 | ns | VCC1 = 5 V, VCC2 = 24 V, CL = 30 pF, TA = 25°C | 5 | ||
| Enable time to the high level | ten1 | 700 | ns | VCC1 = 5 V, VCC2 = 24 V, CL = 30 pF, TA = 25°C | 5 | ||
| Enable time to the low level | ten2 | 400 | ns | VCC1 = 5 V, VCC2 = 24 V, CL = 30 pF, TA = 25°C | 5 | ||
| Disable time from the high level | tdis1 | 900 | ns | VCC1 = 5 V, VCC2 = 24 V, CL = 30 pF, TA = 25°C | 5 | ||
| Disable time from the low level | tdis2 | 600 | ns | VCC1 = 5 V, VCC2 = 24 V, CL = 30 pF, TA = 25°C | 5 | ||
| Junction-to-ambient thermal resistance | RθJA | 60 | °C/W | 4 |
CAD (KiCad official)
- Symbol:
SN754410NE - Footprint:
Package_DIP:DIP-16_W7.62mm - 3D model: PDIP-16 (KiCad packages3D, STEP)
- 3D model files:
sn754410ne-etched.step/sn754410ne-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn754410ne.step/sn754410ne.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (16 pp, sha256
ea72ea1f67e1c758, retrieved 2026-10-30, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).