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ADUM1311ARWZ-RL
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Analog Devices Digital Isolators, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownADUM1311ARWZ-RL
Analog Devices · Digital Isolators · SOIC-16
ADUM1311ARWZ-RL from Analog Devices, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD1 | power_in | Supply voltage for isolator side 1, 2.7 V to 5.5 V. |
| 2 | GND1 | power_in | Ground reference for isolator side 1; internally connected to pin 8, and connecting both to GND1 is recommended. |
| 3 | VIA | input | Logic input A for channel A. |
| 4 | VIB | input | Logic input B for channel B. |
| 5 | VOC | output | Logic output C; it is high when CTRL1 is high or disconnected and VDD2 is off, low when CTRL1 is low and VDD2 is off, and CTRL1 has no effect while VDD2 is powered. |
| 6 | NC | unconnected | No connection. |
| 7 | CTRL1 | input | Default output control for the side 2 outputs; it sets the state of VOC when input power (VDD2) is off and has no effect when VDD2 is powered. |
| 8 | GND1 | power_in | Ground reference for isolator side 1; internally connected to pin 2, and connecting both to GND1 is recommended. |
| 9 | GND2 | power_in | Ground reference for isolator side 2; internally connected to pin 15, and connecting both to GND2 is recommended. |
| 10 | CTRL2 | input | Default output control for the side 1 outputs; VOA and VOB are high when CTRL2 is high or disconnected and VDD1 is off, low when CTRL2 is low and VDD1 is off, and it has no effect when VDD1 is powered. |
| 11 | NC | unconnected | No connection. |
| 12 | VIC | input | Logic input C for channel C. |
| 13 | VOB | output | Logic output B for channel B. |
| 14 | VOA | output | Logic output A for channel A. |
| 15 | GND2 | power_in | Ground reference for isolator side 2; internally connected to pin 9, and connecting both to GND2 is recommended. |
| 16 | VDD2 | power_in | Supply voltage for isolator side 2, 2.7 V to 5.5 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | SOIC-16 |
| Category | Signal Isolation Devices |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Logic High Input Threshold (5 V operation) | VIH | 2 | V | 3 | |||
| Logic Low Input Threshold (5 V operation) | VIL | 0.8 | V | 3 | |||
| Logic High Input Threshold (3 V operation) | VIH | 1.6 | V | 5 | |||
| Logic Low Input Threshold (3 V operation) | VIL | 0.4 | V | 5 | |||
| Input Currents (all models) | IIA, IIB, IIC, ICTRL1, ICTRL2, IDISABLE | -10 | 0.01 | 10 | µA | 0 V ≤ VIA, VIB, VIC ≤ VDD1 or VDD2, 0 V ≤ VCTRL1, VCTRL2 ≤ VDD1 or VDD2, 0 V ≤ VDISABLE ≤ VDD1 | 3 |
| VDD1 Supply Current, ADuM1311, DC to 2 Mbps (5 V operation) | IDD1 (Q) | 2.2 | 2.8 | mA | DC to 1 MHz logic signal frequency | 3 | |
| VDD2 Supply Current, ADuM1311, DC to 2 Mbps (5 V operation) | IDD2 (Q) | 1.8 | 2.4 | mA | DC to 1 MHz logic signal frequency | 3 | |
| VDD1 Supply Current, ADuM1311, DC to 2 Mbps (3 V operation) | IDD1 (Q) | 1 | 1.6 | mA | DC to 1 MHz logic signal frequency | 5 | |
| VDD2 Supply Current, ADuM1311, DC to 2 Mbps (3 V operation) | IDD2 (Q) | 0.9 | 1.4 | mA | DC to 1 MHz logic signal frequency | 5 | |
| Logic Low Output Voltage (5 V and 3 V operation) | VOAL, VOBL, VOCL | 0 | 0.1 | V | IOx = 20 µA, VIx = VIxL | 3 | |
| Logic Low Output Voltage (5 V and 3 V operation) | VOAL, VOBL, VOCL | 0.2 | 0.4 | V | IOx = 4 mA, VIx = VIxL | 3 | |
| Minimum Pulse Width (ADuM131xARWZ) | PW | 1000 | ns | CL = 15 pF, CMOS signal levels | 3 | ||
| Maximum Data Rate (ADuM131xARWZ) | 1 | Mbps | CL = 15 pF, CMOS signal levels | 3 | |||
| Propagation Delay (ADuM131xARWZ, 5 V and 3 V operation) | tPHL, tPLH | 20 | 100 | ns | CL = 15 pF, CMOS signal levels | 3 | |
| Pulse Width Distortion (ADuM131xARWZ) | PWD | 40 | ns | CL = 15 pF, CMOS signal levels | 3 | ||
| Propagation Delay Skew (ADuM131xARWZ) | tPSK | 50 | ns | CL = 15 pF, CMOS signal levels | 3 | ||
| Channel-to-Channel Matching (ADuM131xARWZ) | tPSKCD/OD | 50 | ns | CL = 15 pF, CMOS signal levels | 3 | ||
| Output Rise/Fall Time (10% to 90%) | tR/tF | 2.5 | ns | CL = 15 pF, CMOS signal levels | 4 | ||
| Common-Mode Transient Immunity at Logic High Output | /CMH/ | 25 | 35 | kV/µs | VIx = VDD1 or VDD2, VCM = 1000 V, transient magnitude = 800 V | 4 | |
| Common-Mode Transient Immunity at Logic Low Output | /CML/ | 25 | 35 | kV/µs | VIx = 0 V, VCM = 1000 V, transient magnitude = 800 V | 4 | |
| Refresh Rate (5 V operation) | fr | 1.2 | Mbps | 4 | |||
| Refresh Rate (3 V operation) | fr | 1.1 | Mbps | 6 | |||
| Input Enable Time | tENABLE | 2 | µs | VIA, VIB, VIC = 0 V or VDD1 | 4 | ||
| Input Disable Time | tDISABLE | 5 | µs | VIA, VIB, VIC = 0 V or VDD1 | 4 | ||
| Input Supply Current per Channel, Quiescent (5 V operation) | IDDI (Q) | 0.5 | 0.73 | mA | 4 | ||
| Output Supply Current per Channel, Quiescent (5 V operation) | IDDO (Q) | 0.38 | 0.53 | mA | 4 | ||
| Input Supply Current per Channel, Quiescent (3 V operation) | IDDI (Q) | 0.25 | 0.38 | mA | 6 | ||
| Output Supply Current per Channel, Quiescent (3 V operation) | IDDO (Q) | 0.19 | 0.33 | mA | 6 | ||
| Propagation Delay (ADuM131xARWZ, mixed 5 V/3 V or 3 V/5 V operation) | tPHL, tPLH | 25 | 100 | ns | CL = 15 pF, CMOS signal levels | 8 | |
| Operating Temperature | TA | -40 | 105 | °C | 11 | ||
| Supply Voltages | VDD1, VDD2 | 2.7 | 5.5 | V | All voltages relative to their respective grounds | 11 | |
| Input Signal Rise and Fall Times | 1 | ms | 11 | ||||
| Storage Temperature | TST | -65 | 150 | °C | 12 | ||
| Ambient Operating Temperature | TA | -40 | 105 | °C | 12 | ||
| Supply Voltages | VDD1, VDD2 | -0.5 | 7 | V | All voltages relative to their respective ground | 12 | |
| Input Voltage | VIA, VIB, VIC, VDISABLE, VCTRL1, VCTRL2 | -0.5 | V | Upper limit printed as VDDI + 0.5 V | 12 | ||
| Output Voltage | VOA, VOB, VOC | -0.5 | V | Upper limit printed as VDDO + 0.5 V | 12 | ||
| Average Output Current per Pin, Side 1 | IO1 | -18 | 18 | mA | 12 | ||
| Average Output Current per Pin, Side 2 | IO2 | -22 | 22 | mA | 12 | ||
| Common-Mode Transients | -100 | 100 | kV/µs | Refers to common-mode transients across the insulation barrier | 12 | ||
| Logic High Output Voltage (5 V operation, IOx = -20 µA) | VOAH, VOBH, VOCH | 5 | V | IOx = −20 µA, VIx = VIxH | 3 | ||
| Logic High Output Voltage (5 V operation, IOx = -4 mA) | VOAH, VOBH, VOCH | 4.8 | V | IOx = −4 mA, VIx = VIxH | 3 | ||
| Logic High Output Voltage (3 V operation, IOx = -20 µA) | VOAH, VOBH, VOCH | 3 | V | IOx = −20 µA, VIx = VIxH | 5 | ||
| Logic High Output Voltage (3 V operation, IOx = -4 mA) | VOAH, VOBH, VOCH | 2.8 | V | IOx = −4 mA, VIx = VIxH | 5 | ||
| IC Junction-to-Case Thermal Resistance, Side 1 | θJCI | 33 | °C/W | Thermocouple located at center of package underside | 10 | ||
| IC Junction-to-Case Thermal Resistance, Side 2 | θJCO | 28 | °C/W | 10 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | pC | In accordance with DIN V VDE V 0884-10, each ADuM1310/ADuM1311 is proof-tested by applying an insulation test voltage ≥1050 V peak for 1 second (partial discharge detection limit = 5 pC). The asterisk | 10 |
CAD (KiCad official)
- Symbol:
ADUM1311ARWZ-RL - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOIC-16 (KiCad packages3D, STEP)
- 3D model files:
adum1311arwz-rl-etched.step/adum1311arwz-rl-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);adum1311arwz-rl.step/adum1311arwz-rl.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (24 pp, sha256
0997a5eaebc2abed, retrieved 2026-10-21, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).