XL1509-5.0 from UMW, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VIN	power_in	Supply voltage input. Operates from 4.5 V to 40 V DC (absolute max 45 V). Bypass to GND with a large-value low-ESR capacitor (e.g. 470 uF/35 V CIN + 1 uF ceramic) placed close to the pin to eliminate input switching noise.
2	OUTPUT	output	Power switch output (SW node). Internal high-side switch connects VIN to this pin during on-time; the external Schottky catch diode (e.g. 1N5820) and inductor form the buck power stage. Saturation voltage ~1.2 V typ at 2 A.
3	FEEDBACK	input	Feedback (FB) sense input. For fixed 5.0 V version this pin is tied to the regulated output; the internal reference is 1.23 V and the fixed-output divider is set on-die. Absolute max -0.3 V to VIN.
4	ON/OFF	input	Enable pin, TTL-compatible with hysteresis. Drive low (<0.8 V) to enable the regulator, high (>1.4 V) to shut it down (~80 uA standby). Floating is default low (enabled). Absolute max -0.3 V to VIN.
5	GND	power_in	Ground return. Pins 5, 6, 7, 8 are all GND and should be tied to a solid ground plane; on ESOP-8 the exposed pad also serves as thermal ground.
6	GND	power_in	Ground return. Tie to the same ground plane as pins 5/7/8. Keep this path outside the Schottky-diode-to-output-cap ground loop to avoid switching noise injection.
7	GND	power_in	Ground return. Tie to the same ground plane as pins 5/6/8. Keep this path outside the Schottky-diode-to-output-cap ground loop to avoid switching noise injection.
8	GND	power_in	Ground return. Tie to the same ground plane as pins 5/6/7. Keep this path outside the Schottky-diode-to-output-cap ground loop to avoid switching noise injection.

Key specifications

Parameter	Value
Manufacturer	UMW
Package	SOIC-8
Category	PMIC
Pins	8

Ordering variants

Same part, different packaging or reel option.

XL1509-5.0
XL1509-5.0E

CAD (KiCad official)

Symbol: XL1509-5.0
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SOIC-8 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`xl1509-5-0.step`	122 KB	You want the bare part, or you mark your own boards.
`xl1509-5-0-etched.step`	1.9 MB	You want the part with `XL1509-5.0` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 478 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: UMW datasheet (15 pp, sha256 bd5713838034a224, retrieved 2026-08-17, tier: lcsc)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF