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Contents

README

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ADA4530-1ARZ

Analog Devices · Operational Amplifier · SOIC-8

ADA4530-1ARZ from Analog Devices, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 +IN input Non-inverting input, which also feeds the guard-ring buffer; the input common-mode range is V− to V+ − 1.5 V, and operation outside that range is not recommended.
2 GRD output Guard-ring buffer output that drives the guard around the high-impedance input; it has about 1 kΩ output resistance, and the datasheet advises against loading it except for insulation-resistance guarding, since each 1 nA of load adds 1 µV of guard error per kΩ.
3 IC passive Internal connection that must be tied to V− or left unconnected.
4 V− power_in Negative supply voltage; the part operates from 4.5 V to 16 V total (±2.25 V to ±8 V dual supply).
5 V+ power_in Positive supply voltage; the part operates from 4.5 V to 16 V total (±2.25 V to ±8 V dual supply), with an absolute maximum supply of 17 V.
6 OUT output Rail-to-rail output that typically swings to within 30 mV of the supply rails with a 10 kΩ load.
7 GRD output Guard-ring buffer output, the second guard pin, which can be connected to the guard ring; the datasheet advises against driving any load other than insulation-resistance guarding through the buffer.
8 −IN input Inverting input; the input current must be limited to 10 mA and the differential input voltage is rated to ±0.7 V.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package SOIC-8
Category Amplifiers/Comparators
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input bias current IB -20 20 fA RH < 50% 5
Input bias current IB -250 250 fA -40°C < TA < +125°C, RH < 50% 5
Input offset current IOS -20 20 fA RH < 50% 5
Input offset current IOS -150 150 fA -40°C < TA < +125°C, RH < 50% 5
Input offset voltage VOS -40 8 40 μV 5
Input offset voltage VOS -50 9 50 μV VCM = 1.5 V to 3 V 5
Input offset voltage VOS -70 70 μV VCM = 1.5 V to 3 V, 0°C < TA < 125°C 5
Input offset voltage VOS -150 150 μV VCM = 1.5 V to 3 V, -40°C < TA < 0°C 5
Input offset voltage VOS -300 300 μV VCM = 0 V to 3 V 5
Input offset voltage drift ΔVOS/ΔT -0.5 0.13 0.5 μV/°C 0°C < TA < 125°C 5
Input offset voltage drift ΔVOS/ΔT -2.8 -0.7 2.8 μV/°C -40°C < TA < 0°C 5
Input voltage range IVR 0 3 V 5
Common-mode rejection ratio CMRR 92 114 dB VCM = 1.5 V to 3 V 5
Common-mode rejection ratio CMRR 90 dB -40°C < TA < +125°C 5
Common-mode rejection ratio CMRR 73 dB VCM = 0 V to 3 V 5
Large-signal voltage gain AVO 120 143 dB RL = 2 kΩ to VCM, VOUT = 0.2 V to 4.3 V 5
Large-signal voltage gain AVO 120 dB -40°C < TA < +125°C 5
Input resistance RIN 100 TΩ -40°C < TA < +125°C (printed >100) 5
Output high voltage VOH 4.47 4.49 V RL = 10 kΩ to VCM 5
Output high voltage VOH 4.46 V -40°C < TA < +125°C, RL = 10 kΩ to VCM 5
Output high voltage VOH 4.4 4.45 V RL = 2 kΩ to VCM 5
Output high voltage VOH 4.38 V -40°C < TA < +125°C, RL = 2 kΩ to VCM 5
Output low voltage VOL 10 30 mV RL = 10 kΩ to VCM 5
Output low voltage VOL 40 mV -40°C < TA < +125°C, RL = 10 kΩ to VCM 5
Output low voltage VOL 30 100 mV RL = 2 kΩ to VCM 5
Output low voltage VOL 120 mV -40°C < TA < +125°C, RL = 2 kΩ to VCM 5
Short-circuit current, source ISC 15 mA Sourcing 5
Short-circuit current, sink ISC -30 mA Sinking 5
Power supply rejection ratio PSRR 130 150 dB VSY = 4.5 V to 16 V 5
Power supply rejection ratio PSRR 130 dB -40°C < TA < +125°C 5
Supply current ISY 0.9 1.3 mA IOUT = 0 mA 5
Supply current ISY 1.5 mA -40°C < TA < +125°C, IOUT = 0 mA 5
Guard buffer input offset voltage VGOS 15 100 μV VCM = 1.5 V to 3 V 6
Guard buffer input offset voltage VGOS 120 μV VCM = 1.5 V to 3 V, 0°C < TA < 125°C 6
Guard buffer input offset voltage VGOS 250 μV VCM = 1.5 V to 3 V, -40°C < TA < 0°C 6
Guard buffer input offset voltage VGOS 150 μV VCM = 0.1 V to 3 V 6
Guard buffer offset voltage drift ΔVGOS/ΔT 0.18 1 μV/°C 0°C < TA < +125°C 6
Guard buffer offset voltage drift ΔVGOS/ΔT 1.4 7 μV/°C -40°C < TA < 0°C 6
Guard buffer output voltage range VGOS 0.1 3 V VGOS < 150 μV 6
Supply voltage VSY 4.5 16 V Single or dual supply (headline feature) 1
Operating temperature range TA -40 125 °C Industrial range (headline feature) 1

CAD (KiCad official)

  • Symbol: ADA4530-1ARZ
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: ada4530-1arz-etched.step / ada4530-1arz-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ada4530-1arz.step / ada4530-1arz.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (53 pp, sha256 6a8a71abd4e418fd, retrieved 2026-10-19, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF