Loads when you scroll to it. Unloads after 5 minutes in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

PCB Footprint

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Loads when you scroll to it. Unloads after 5 minutes in the background.
Download PDF
Contents

README

markdown

DS8571-30S5

DSTECH · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5

DS8571-30S5 from DSTECH, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VIN power_in Input of supply voltage, specified for 2.3V to 6V with absolute maximum VIN to GND of -0.3V to 7V, and a 1µF or larger input capacitor should be placed close to VIN and GND.
2 GND power_in Ground reference for the regulator; input and output capacitor ground connections should return to this pin through as wide and short a copper trace as practical.
3 EN input Enable control input, with EN rising threshold VIH of 1.0V and falling threshold VIL of 0.4V, and absolute maximum of -0.3V to 6V to GND; pulling it low puts the part in shutdown with about 0.1µA typical current.
4 NC unconnected No internal connection on this variant (the SNS sense pin exists only on the DS8571N version), so it can be left unconnected.
5 VOUT power_out Output of the regulator, which requires an output capacitor between 1µF and 22µF with minimum 1mΩ ESR placed close to VOUT and GND; the output is current limited to 550mA typical and VOUT to GND is rated -0.3V to 6V.

Key specifications

Parameter Value
Manufacturer DSTECH
Package SOT-23-5
Category Power Management (PMIC)
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage VIN 2.3 6 V 7
DC Output Voltage Accuracy -2 2 % ILOAD =0.1mA 7
Dropout Voltage (VOUT ≥ 3V, applies to 3.0V variant) VDROP_3V 0.06 V ILOAD =100mA; VOUT ≥ 3V (Note 3) 7
Ground Current IQ 30 μA ILOAD = 0mA 7
Shutdown Ground Current ISD 0.1 0.5 μA VEN = 0V, VOUT = 0V 7
Enable Threshold Voltage (rising) VIH 1 V EN Rising 7
Enable Threshold Voltage (falling) VIL 0.4 V EN Falling 7
EN Input Current IEN 10 100 nA VEN = 5V 7
Line Regulation ΔLINE 0.3 % ILOAD =30mA, 2.5V ≤ VIN ≤ 5.5V or (VOUT + 0.2V) ≤ VIN ≤ 5.5V 7
Load Line ΔLOAD 20 mV 1mA ≤ ILOAD ≤ 300mA 7
Output Current Limit ILIM 301 550 mA VOUT = 0V 7
Thermal Shutdown Temperature TSD 160 °C ILOAD =10mA 7
Thermal Shutdown Hysteresis ΔTSD 20 °C 7
Discharge Resistance RDC 30 Ω EN = 0V, VOUT = 0.1V 7
Input Voltage (recommended) VIN 2.3 6 V 6
Junction Temperature Range (recommended) TJ -40 125 °C 6
Ambient Temperature Range (recommended) TA -40 85 °C 6
VIN to GND VIN -0.3 7 V Note 1 6
VOUT, EN to GND VOUT, EN -0.3 6 V Note 1 6
VOUT to VIN VOUT-VIN -6 0.3 V Note 1 6
Lead Temperature (Soldering, 10 sec.) 260 °C Soldering, 10 sec. 6
Junction Temperature TJ 150 °C 6
Storage Temperature Range TSTG -60 150 °C 6
ESD Susceptibility HBM HBM 2 KV 6
ESD Susceptibility MM MM 200 V 6
ESD Susceptibility CDM CDM 2 KV 6
Package Thermal Resistance, SOT-23-5 / SOT-23-3 θJA 220 oC /W TA=25°C, DSTECH EVB board (Note 2) 6
Maximum Power Dissipation, SOT-23-5 (printed) PD 0.45 W TA=25°C, DS-Tech PCB 12

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts copper must be back to the DS8571 ground pin using as wide and as short of a copper trace as is practical. 12

CAD (KiCad official)

  • Symbol: DS8571-30S5
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: ds8571-30s5-etched.step / ds8571-30s5-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ds8571-30s5.step / ds8571-30s5.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: DSTECH datasheet (18 pp, sha256 481282d70f89eeec, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF