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Contents

README

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TM2N7002K

Tritech MOS · MOSFETs · SOT-23

TM2N7002K from Tritech MOS, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate; gate-source voltage is rated at ±20 V with a typical threshold of 1.5 V (1 V min, 2.5 V max at ID=250μA) and ESD protection is listed.
2 S passive Source; continuous drain current is rated at 0.3 A at TA=25℃ and the body diode forward current is rated at 0.3 A.
3 D passive Drain; drain-source voltage is rated at 60 V with 0.3 A continuous and 1.2 A pulsed drain current.

Key specifications

Parameter Value
Manufacturer Tritech MOS
Package SOT-23
Category Transistors/Thyristors
Pins 3

CAD (KiCad official)

  • Symbol: TM2N7002K
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)
  • 3D model files: tm2n7002k-etched.step / tm2n7002k-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tm2n7002k.step / tm2n7002k.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Tritech MOS datasheet (5 pp, sha256 83703483df979624, retrieved 2026-10-09, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF