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Contents

README

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TPD4E002DRL2

Texas Instruments · ESD And Surge Protection (TVS/ESD) · SOT-553-5

TPD4E002DRL2 from Texas Instruments, in a SOT-553-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 I/O1 bidirectional ESD protection I/O channel with minimum breakdown voltage VBR = 6.1 V, I/O capacitance 11 pF, operating range 0 to 5 V
2 GND power_in Ground reference for ESD dissipation path
3 I/O2 bidirectional ESD protection I/O channel with minimum breakdown voltage VBR = 6.1 V, I/O capacitance 11 pF, operating range 0 to 5 V
4 I/O3 bidirectional ESD protection I/O channel with minimum breakdown voltage VBR = 6.1 V, I/O capacitance 11 pF, operating range 0 to 5 V
5 I/O4 bidirectional ESD protection I/O channel with minimum breakdown voltage VBR = 6.1 V, I/O capacitance 11 pF, operating range 0 to 5 V

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOT-553-5
Category Circuit Protection
Pins 5

CAD (KiCad official)

  • Symbol: TPD4E002DRL2
  • Footprint: Package_TO_SOT_SMD:SOT-553
  • 3D model: SOT-553-5 (KiCad packages3D, STEP)
  • 3D model files: tpd4e002drl2-etched.step / tpd4e002drl2-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tpd4e002drl2.step / tpd4e002drl2.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (19 pp, sha256 a8d8a349ad46ec9e, retrieved 2026-09-26, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF