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DRV8304HRHAR
Public Made by Adomby adom
Texas Instruments Gate Drivers, VQFN-40-EP(6x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownDRV8304HRHAR
Texas Instruments · Gate Drivers · VQFN-40-EP(6x6)
DRV8304HRHAR from Texas Instruments, in a VQFN-40-EP(6x6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CPL | passive | Charge pump switching node; connect a X5R or X7R, 22-nF, VM-rated ceramic capacitor between CPH and CPL. |
| 2 | CPH | passive | Charge pump switching node; connect a X5R or X7R, 22-nF, VM-rated ceramic capacitor between CPH and CPL. |
| 3 | VCP | power_out | Charge pump output; connect a X5R or X7R, 1-µF, 16-V ceramic capacitor between VCP and VM. |
| 4 | VM | power_in | Gate driver power supply input connected to the bridge supply, with a 0.1-µF VM-rated ceramic and at least 10-µF local capacitance to PGND. |
| 5 | VDRAIN | input | High-side MOSFET drain sense input; connect to the common point of the external MOSFET drains. |
| 6 | GHA | output | High-side gate driver output; connect to the gate of the high-side power MOSFET. |
| 7 | SHA | input | High-side source sense input; connect to the high-side power MOSFET source. |
| 8 | GLA | output | Low-side gate driver output; connect to the gate of the low-side power MOSFET. |
| 9 | SPA | input | Low-side source sense and shunt amplifier input; connect to the low-side power MOSFET source and high side of the current shunt resistor. |
| 10 | SNA | input | Shunt amplifier input; connect to the low side of the current shunt resistor. |
| 11 | SNB | input | Shunt amplifier input; connect to the low side of the current shunt resistor. |
| 12 | SPB | input | Low-side source sense and shunt amplifier input; connect to the low-side power MOSFET source and high side of the current shunt resistor. |
| 13 | GLB | output | Low-side gate driver output; connect to the gate of the low-side power MOSFET. |
| 14 | SHB | input | High-side source sense input; connect to the high-side power MOSFET source. |
| 15 | GHB | output | High-side gate driver output; connect to the gate of the high-side power MOSFET. |
| 16 | GHC | output | High-side gate driver output; connect to the gate of the high-side power MOSFET. |
| 17 | SHC | input | High-side source sense input; connect to the high-side power MOSFET source. |
| 18 | GLC | output | Low-side gate driver output; connect to the gate of the low-side power MOSFET. |
| 19 | SPC | input | Low-side source sense and shunt amplifier input; connect to the low-side power MOSFET source and high side of the current shunt resistor. |
| 20 | SNC | input | Shunt amplifier input; connect to the low side of the current shunt resistor. |
| 21 | SOC | output | Shunt amplifier output. |
| 22 | SOB | output | Shunt amplifier output. |
| 23 | SOA | output | Shunt amplifier output. |
| 24 | VREF | power_in | Shunt amplifier power supply input and reference; connect a X5R or X7R, 0.1-µF, 6.3-V ceramic capacitor between VREF and AGND. |
| 25 | nFAULT | output | Open-drain fault indicator output that is pulled logic low during a fault condition and requires an external pullup resistor. |
| 26 | MODE | input | PWM input mode setting; a 4-level input pin set by an external resistor. |
| 27 | IDRIVE | input | Gate drive output current setting; a 7-level input pin set by an external resistor. |
| 28 | VDS | input | VDS monitor trip point setting; a 7-level input pin set by an external resistor. |
| 29 | GAIN | input | Amplifier gain setting; a 4-level input pin set by an external resistor. |
| 30 | ENABLE | input | Gate driver enable; logic low puts the device in low power sleep mode, and a 5 to 32-µs low pulse resets fault conditions. |
| 31 | CAL | input | Amplifier calibration input; set logic high to internally short amplifier inputs and perform offset calibration. |
| 32 | AGND | power_in | Device analog ground; connect to system ground. |
| 33 | DVDD | power_out | 3.3-V internal regulator output that can source up to 30 mA externally, with a 1-µF, 6.3-V ceramic capacitor to AGND. |
| 34 | INHA | input | High-side gate driver control input that controls the output of GHA. |
| 35 | INLA | input | Low-side gate driver control input that controls the output of GLA. |
| 36 | INHB | input | High-side gate driver control input that controls the output of GHB. |
| 37 | INLB | input | Low-side gate driver control input that controls the output of GLB. |
| 38 | INHC | input | High-side gate driver control input that controls the output of GHC. |
| 39 | INLC | input | Low-side gate driver control input that controls the output of GLC. |
| 40 | PGND | power_in | Device power ground; connect to system ground. |
| 41 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-40-EP(6x6) |
| Category | Motor Driver ICs |
| Pins | 41 |
CAD (KiCad official)
- Symbol:
DRV8304HRHAR - Footprint:
Package_DFN_QFN:QFN-40-1EP_6x6mm_P0.5mm_EP4.6x4.6mm - 3D model: VQFN-40-EP(6x6) (KiCad packages3D, STEP)
- 3D model files:
drv8304hrhar-etched.step/drv8304hrhar-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);drv8304hrhar.step/drv8304hrhar.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (72 pp, sha256
0f41cab19ba9226b, retrieved 2026-10-07, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).